VS-2N681, VS-2N5205 Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristor RMS SCRs, 25 A, 35 A
FEATURES
• General purpose stud mounted
• Broad forward and reverse voltage range -
through 1200 V
• Material categorization: for definitions of
compliance please see
www.vishay.com/doc?99912
TO-48 (TO-208AA)
PRIMARY CHARACTERISTICS
I
T(AV)
I
T(RMS)
V
DRM
/V
RRM
V
TM
I
GT
T
J
Package
Circuit configuration
16 A, 22 A
25 A, 35 A
25 V, 50 V, 100 V, 150 V, 200 V, 250 V,
300 V, 400 V, 500 V, 600 V, 700 V, 800 V,
1000 V 1200 V
2.3 V
60 mA
-40 °C to +125 °C
TO-48 (TO-208AA)
Single SCR
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
I
GT
dV/dt
dI/dt
V
DRM
V
RRM
T
J
Note
(1)
JEDEC
®
registered value
Range
Range
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
2N681-92
16
(1)
T
C
-65 to +65
25
145
150
94
40
-
75 to 100
25 to 800
25 to 800
-65 to +125
(1)
(1)
(1)
VALUES
2N5205-07
22
(1)
-40 to +40
35
285
300
(1)
410
375
40
100
(1)
100
600 to 1200
600 to 1200
-40 to +125
(1)
UNITS
A
°C
A
A
A
2
s
mA
V/μs
A/μs
V
V
°C
103
Revision: 21-Sep-17
Document Number: 93706
1
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-2N681, VS-2N5205 Series
www.vishay.com
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS (APPLIED GATE VOLTAGE ZERO OR NEGATIVE)
TYPE NUMBER
VS-2N681
VS-2N682
VS-2N683
VS-2N684
VS-2N685
VS-2N686
VS-2N687
VS-2N688
VS-2N689
VS-2N690
VS-2N691
VS-2N692
VS-2N5205
VS-2N5206
VS-2N5207
Note
• JEDEC registered values
V
RRM
/V
DRM
, MAXIMUM REPETITIVE PEAK
REVERSE AND OFF-STATE VOLTAGE
V
25
50
100
150
200
250
300
400
500
600
700
800
800
1000
1200
V
RSM
, MAXIMUM NON-REPETITIVE
PEAK REVERSE VOLTAGE (t
p
< 5 ms)
V
35
75
150
200
300
350
400
500
600
720
840
960
960
1200
1440
-40 °C to +125 °C
-65 °C to +125 °C
T
J
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state
current at case temperature
Maximum RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
50 Hz half cycle sine wave
or 6 ms rectangular pulse
Maximum peak, one-cycle
non-repetitive surge current
60 Hz half cycle sine wave
or 5 ms rectangular pulse
50 Hz half cycle sine wave
or 6 ms rectangular pulse
60 Hz half cycle sine wave
or 5 ms rectangular pulse
t = 10 ms
Maximum
I
2
t
capability for fusing
I
2
t
Maximum I
2
t capability for
individual device fusing
Maximum I
2
t
capability for
individual device fusing
Maximum peak on-state voltage
Maximum holding current
Notes
(1)
JEDEC registered value
(2)
I
2
t for time t = I
2
t
·
t
x
x
I
2
t
(2)
V
TM
I
H
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Following any rated
load condition, and
with rated V
RRM
applied
following surge
Same conditions as
above except with
V
RRM
applied following
surge = 0
Rated V
RRM
applied
following surge,
initial T
J
= 125 °C
V
RRM
= 0 following
surge, initial T
J
= 125 °C
TEST CONDITIONS
180° half sine wave conduction
VALUES
2N681-92
16
(1)
25
145
150
(1)
170
180
103
94
145
135
1450
2
(1)
20 at 25 °C
(typical)
VALUES
2N5205-07
22
(1)
35
285
300
(1)
A
340
355
410
375
580
530
5800
2.3
(1)
200
(1)
at
-40 °C
A
2
s
V
mA
A
2
s
UNITS
A
°C
A
-65 to +65
(1)
-40 to +40
(1)
I
TSM
t = 0.1 ms to 10 ms, initial T
J
< 125 °C
V
RRM
applied following surge = 0
T
J
= 25 °C, I
T(AV)
= 16 A (50 A peak) 2N681,
I
T(AV)
= 22 A (70 A peak) 2N5204
Anode supply 24 V, initial I
T
= 1.0 A
Revision: 21-Sep-17
Document Number: 93706
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-2N681, VS-2N5205 Series
www.vishay.com
Vishay Semiconductors
VALUES
VALUES
UNITS
2N681-92 2N5205-07
100
75
-
-
A/μs
-
100
SWITCHING
PARAMETER
V
DM
= 25 V to 600 V
Maximum non-repetitive
rate of rise of turned-on
current
V
DM
= 700 V to 800 V
dI/dt
SYMBOL
TEST CONDITIONS
T
C
= 125 °C, V
DM
= Rated V
DRM
,
I
TM
= 2 x dI/dt, gate pulse = 20 V,
15
,
t
p
= 6 μs, t
r
= 0.1 μs maximum
Per JEDEC standard RS-397, 5.2.2.6
T
C
= 125 °C, V
DM
= 600 V, I
TM
= 200 A at
400 Hz maximum, gate pulse = 20 V, 15
,
t
p
= 6 μs, t
r
= 0.1 μs maximum
Per JEDEC standard RS-397, 5.2.2.6
T
C
= 25 °C, V
DM
= Rated V
DRM
, I
TM
= 10 A
DC resistive circuit, gate pulse = 10 V,
40
source, t
p
= 6 μs, t
r
= 0.1 μs
Typical delay time
t
d
1
1
μs
BLOCKING
PARAMETER
Minimum critical rate of
rise of off-state voltage
V
RRM
, V
DRM
= 400 V
V
RRM
, V
DRM
= 500 V
V
RRM
, V
DRM
= 600 V
V
RRM
, V
DRM
= 700 V
V
RRM
, V
DRM
= 800 V
V
RRM
, V
DRM
= 1000 V
V
RRM
, V
DRM
= 1200 V
SYMBOL
TEST CONDITIONS
T
J
= 125 °C, exponential
to 100 % rated V
DRM
T
J
= 125 °C, exponential
to 67 % rated V
DRM
Gate open
circuited
VALUES
VALUES
UNITS
2N681-92 2N5205-07
100
(typical)
250
(typical)
3.5
3.5
2.5
2.2
2
-
-
100
(1)
V/μs
250
-
-
3.3
-
2.5
2
1.7
dV/dt
Maximum reverse
leakage current
I
DRM
,
I
RRM
T
J
= 125 °C
mA
Note
(1)
JEDEC registered value
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
+I
GM
+V
GM
-V
GM
T
C
= min.
rated value
I
GT
Maximum required gate trigger current
is the lowest value which will trigger all
units with + 6 V anode to cathode
TEST CONDITIONS
t
p
< 5 ms for 2N681 series;
t
p
< 500 μs for 2N5204 series
VALUES
2N681-92
5
(1)
0.5
2
(1)
10
(1)
5
(1)
80
(1)
40
18.5
30
3
(1)
2
1.5
0.25
(1)
(1)
VALUES
UNITS
2N5205-07
60
(1)
0.5
2
-
5
(1)
(1)
W
A
V
Maximum required DC gate
current to trigger
80
(1)
40
20
30
3
(1)
V
2
1.5
0.25
(1)
V
mA
Typical DC gate current to trigger
Maximum required DC gate
voltage to trigger
Typical DC gate voltage to trigger
Maximum DC gate voltage
not to trigger
Note
(1)
JEDEC registered value
V
GD
V
GT
T
C
= 25 °C
T
C
= 125 °C
T
C
= 25 °C, + 6 V anode to cathode
Maximum required gate trigger voltage
T
C
= -65 °C is the lowest value which will trigger all
units with + 6 V anode to cathode
T
C
= 25 °C
T
C
= 25 °C, + 6 V anode to cathode
Maximum gate voltage not to trigger is
the maximum value which will not
T
C
= 125 °C
trigger any unit with rated V
DRM
anode
to cathode
Revision: 21-Sep-17
Document Number: 93706
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-2N681, VS-2N5205 Series
www.vishay.com
Vishay Semiconductors
VALUES
2N681-92
-65 to 125
(1)
DC operation
Mounting surface, smooth, flat and greased
Lubricated threads
(Non-lubricated threads)
1.5
0.35
20 (27.5)
0.23 (0.32)
2.3 (3.1)
25
0.29
2.8
14
0.49
14
0.5
TO-48 (TO-208AA)
VALUES
2N5205-07
-40 to 125
(1)
1.5
(1)
°C/W
R
thCS
0.35
lbf · in
kgf · cm
N·m
lbf · in
kgf · cm
N·m
g
oz.
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Operating junction and
storage temperature range
Maximum internal thermal resistance,
junction to case
Typical thermal resistance,
case to sink
to nut
Mounting torque
± 10 %
to device
Lubricated threads
SYMBOL
T
J
, T
Stg
R
thJC
TEST CONDITIONS
UNITS
°C
Approximate weight
Case style
Note
(1)
JEDEC registered value
Maximum Allowable Case Temperature (°C)
Instantaneous On-State Current (A)
180
160
Ø
200
10
2
4
10
4
T
J
= 125 °C
1.0
4
10
-1
0
1
2
3
4
5
6
7
T
J
= 25 °C
140
120
100
80
60
Conduction Period
Sinusoidal
Current Waveform
T
J
= 125 °C
+180°
40
20
0
0
2
+30° +60° +90° +120°
DC
4
6
8 10 12 14 16 18 20 22 24
Average On-State Current Over Full Cycle (A)
Fig. 1 - Maximum Allowable Case Temperature
vs. Average On-State Current,
2N681 Series
Instantaneous On-State Voltage (V)
Fig. 2 - Maximum On-State Voltage vs. Current,
2N681 Series
Revision: 21-Sep-17
Document Number: 93706
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-2N681, VS-2N5205 Series
www.vishay.com
70
10
Vishay Semiconductors
+120°
+180°
DC
Average Forward Power Loss
Over Full Cycle (W)
+60°
+30°
+90°
Instantaneous
Gate
Voltage (V)
60
50
40
30
20
T
J
= 125 °C
Sinusoidal
Current
Waveform
Controlled
Rectifier
Turned
Fully On
9
8
7
6
5
4
3
2
1
0
0
0.2
0.4
0.6
Maximum Allowable
Instantaneous
Gate
Power Dissipation
5.0 W
Area of Certain Triggering
Area of All Possible
Triggering Points
Ø
10
0
0
4
8
12
16
Conduction Angle
20
24
28
32
36
0.8
1.0
1.2
Average On-State Current Over Full Cycle (A)
Fig. 3 - Maximum Low Level On-State Power Loss vs.
Current (Sinusoidal Current Waveform),
2N681 Series
10
4
Instantaneous
Gate
Current (A)
Fig. 5 - Gate Characteristics,
2N681 Series
I
F
-Average Forward Power Loss
Over Full Cycle (W)
4
10
3
4
10
2
T
J
= 125 °C
Sinusoidal
Current Waveform
Controlled Rectifier
Turned Fully On
DC
+180°
3
-65 °C
Gate
Voltage (V)
+120°
+90°
+60°
+30°
2
25 °C
4
10
4
1.0
1.0
4
10
4
10
2
4
10
3
Ø
1
125 °C
Conduction Angle
0
0
25
50
V
GD
(Max.) = 0.25 V
75
100
125
Average On-State Current Over Full Cycle (A)
Fig. 4 - Maximum High Level On-State Power Loss vs. Current
(Sinusoidal Current Waveform),
2N681 Series
Gate
Current (mA)
Fig. 5a - Area of All Possible Triggering Points vs. Temperature,
2N681 Series
Z
thJC
- Transient Thermal Impedance (°C/W)
10
1
4
10
-1
4
1.0
4
10
4
10
2
4
10
3
4
10
4
Free Convection
Forced Convection at 1000 LFM
Infinite Heatsink
Mounted on Infinite Heatsink
and 4" x 4" x 1/16" Copper Fin
Long Time Durations
1.0
4
1.0
4
10
-1
4
Short
Time Durations
10
-1
4
10
-2
10
-6
4
10
-5
4
10
-4
4
10
-3
4
10
-2
4
10
-2
10
-1
t -
Square
Wave Pulse Duration (s)
Fig. 6 - Maximum Transient Thermal Impedance, Junction to Case, vs. Pulse Duration,
2N681 Series
Revision: 21-Sep-17
Document Number: 93706
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
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