1. The OE (output enable) signal is synchronized with the low level of the
HSTL_CLK and LVPECL_CLK signal.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CCI/
V
CCO
V
IN
I
OUT
Tstore
Rating
V
CC
Pin Potential to Ground Pin
Input Voltage
DC Output Current (Output HIGH)
Storage Temperature
Value
–0.5 to +4.0
–0.5 to V
CCI
–50
–65 to +150
Unit
V
V
mA
°C
NOTE:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data book. Exposure to ABSOLUTE MAXIMUM RATING conditions
for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Power Supply
T
A
= 0
°
C
Symbol
V
CCI
V
CCO
I
CCI
V
CC
Core
V
CC
Output
I
CC
Core
Parameter
Min.
3.0
1.6
—
Typ.
3.3
1.8
115
Max.
3.6
2.0
140
Min.
3.0
1.6
—
T
A
= +25
°
C
Typ.
3.3
1.8
115
Max.
3.6
2.0
140
Min.
3.0
1.6
—
T
A
= +70
°
C
Typ.
3.3
1.8
115
Max.
3.6
2.0
140
Unit
V
V
mA
HSTL
T
A
= 0
°
C
Symbol
V
OH
V
OL
V
IH
V
IL
V
X
I
IH
I
IL
Parameter
Output HIGH Voltage
(1)
Output LOW Voltage
(1)
Input HIGH Voltage
Input LOW Voltage
Input Crossover Voltage
Input HIGH Current
Input LOW Current
Min.
1.0
0
V
X
+0.1
–0.3
0.68
+20
—
Typ.
—
—
—
—
—
—
—
Max.
1.2
0.4
1.6
V
X
–0.1
0.9
–350
–500
Min.
1.0
0
V
X
+0.1
–0.3
0.68
+20
—
T
A
= +25
°
C
Typ.
—
—
—
—
—
—
—
Max.
1.2
0.4
1.6
V
X
–0.1
0.9
–350
–500
Min.
1.0
0
V
X
+0.1
–0.3
0.68
+20
—
T
A
= +70
°
C
Typ.
—
—
—
—
—
—
—
Max.
1.2
0.4
1.6
V
X
–0.1
0.9
–350
–500
Unit
V
V
V
V
V
µA
µA
NOTE:
1. Outputs loaded with 50Ω to ground.
2
Micrel
ClockWorks™
SY89824L
DC ELECTRICAL CHARACTERISTICS
LVPECL
T
A
= 0
°
C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Min.
Max.
T
A
= +25
°
C
Min.
Max.
T
A
= +70
°
C
Min.
Max.
Unit
V
V
µA
µA
V
CCI
– 1.165 V
CCI
– 0.880 V
CCI
– 1.165 V
CCI
– 0.880 V
CCI
– 1.165 V
CCI
– 0.880
V
CCI
– 1.810 V
CCI
– 1.475 V
CCI
– 1.810 V
CCI
– 1.475 V
CCI
– 1.810 V
CCI
– 1.475
—
0.5
+150
—
—
0.5
+150
—
—
0.5
+150
—
LVCMOS/LVTTL
T
A
= 0
°
C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Min.
2.0
—
+20
—
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Min.
2.0
—
+20
—
T
A
= +25
°
C
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Min.
2.0
—
+20
—
T
A
= +70
°
C
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Unit
V
V
µA
µA
AC ELECTRICAL CHARACTERISTICS
(1)
T
A
= 0
°
C
Symbol
t
PHL
t
PLH
t
skew
t
skpp
V
PP
V
CMR
t
S
t
H
t
r
t
f
Parameter
Propagation Delay
(2)
Within-Device Skew
(3)
Part-to-Part Skew
(4)
Minimum Input Swing
(5)
LVPECL_CLK
Common Mode Range
(6)
LVPECL_CLK
OE Set-Up Time
(7)
OE Hold Time
Output Rise/Fall Time
(20% – 80%)
Min.
—
—
—
600
–1.5
1.0
0.5
300
Typ.
1.0
—
—
—
—
—
—
—
Max.
—
50
200
—
–0.4
—
—
800
Min.
—
—
—
600
–1.5
1.0
0.5
300
T
A
= +25
°
C
Typ.
1.0
—
—
—
—
—
—
—
Max.
—
50
200
—
–0.4
—
—
800
—
—
—
600
–1.5
1.0
0.5
300
T
A
= +70
°
C
Min.
Typ.
1.0
—
—
—
—
—
—
—
Max.
—
50
200
—
–0.4
—
—
800
Unit
ns
ps
ps
mV
V
ns
ns
ps
NOTES:
1. Outputs loaded with 50Ω to ground. Airflow
≥
300 LFPM.
2. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential
output signals.
3. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same
voltage and temperature.
4. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
voltage and temperature.
5. The V
PP
(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
6. V
CMR
is defined as the range within which the V
IH
level may vary, with the device still meeting the propagation delay specification. The numbers in
the table are referenced to V
CCI
. The V
IL
level must be such that the
peak-to-peak voltage is less than 1.0V and greater than or equal to
PRODUCT ORDERING CODE
V
PP
(min.). The lower end of the CMR range varies 1:1 with V
CCI
. The
V
CMR
(min) will be fixed at 3.3V – |V
CMR
(min)|.
7. OE set-up time is defined with respect to the rising edge of the clock.
Ordering
Package
Operating
OE HIGH to LOW transition ensures outputs remain disabled during
Code
Type
Range
the next clock cycle. OE LOW to HIGH transition enables normal
operation of the next input clock.
SY89824LHC
H64-1
Commercial
3
Micrel
ClockWorks™
SY89824L
64 LEAD EPAD-TQFP (DIE UP) (H64-1)
+0.05
–0.05
+0.002
–0.002
+0.05
–0.05
+0.012
–0.012
+0.03
–0.03
+0.012
–0.012
+0.15
–0.15
+0.006
–0.006
+0.05
–0.05
+0.002
–0.002
Rev. 02
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
FAX
+ 1 (408) 980-9191
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
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