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SY10E457JCTR

Description
TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER
Categorylogic    logic   
File Size60KB,4 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric Compare View All

SY10E457JCTR Overview

TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER

SY10E457JCTR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicrochip
package instructionQCCJ, LDCC28,.5SQ
Reach Compliance Code_compli
series10E
JESD-30 codeS-PQCC-J28
JESD-609 codee0
length11.48 mm
Logic integrated circuit typeMULTIPLEXER
Humidity sensitivity level1
Number of functions3
Number of entries2
Output times1
Number of terminals28
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristicsOPEN-EMITTER
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC28,.5SQ
Package shapeSQUARE
Package formCHIP CARRIER
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)240
power supply-5.2 V
Maximum supply current (ICC)110 mA
Prop。Delay @ Nom-Su0.7 ns
propagation delay (tpd)0.7 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
surface mountYES
technologyECL
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width11.48 mm
TRIPLE DIFFERENTIAL
2:1 MULTIPLEXER
SY10E457
SY100E457
FEATURES
s
Differential D and Q
s
Extended 100E V
EE
range of –4.2V to –5.5V
s
s
s
s
VBB output for single-ended use
700ps max. propagation delay
High frequency outputs
Separate and common select
DESCRIPTION
The SY10/100E457 are 3-bit differential 2:1
multiplexers. The fully differential data path makes the
devices ideal for multiplexing low skew clock or other
skew sensitive signals. Multiple V
BB
pins are provided to
ease AC coupling input signals.
The higher frequency outputs provide the device with
a >1.0GHz bandwidth to meet the needs of the most
demanding system clock.
Both separate selects and a common select are
provided to make the device well suited for both data
path and random logic applications.
s
Internal 75K
input pulldown resistors
s
Available in 28-pin PLCC package
BLOCK DIAGRAM
PIN CONFIGURATION
H
2:1
MUX
SEL
2
D
2a
D
2a
V
BB
Q
0
Q
0
D
0b
D
0b
SEL
0
L
25 24 23 22 21 20 19
SEL
1
D
1a
D
1a
D
2b
COMSEL
D
0a
D
0a
D
2b
26
27
28
1
2
3
4
5
6
7
8
9
10 11
18
17
Q
2
Q
2
V
CC
Q
1
Q
1
Q
0
Q
0
D
1a
D
1a
D
1b
D
1b
SEL
1
H
2:1
MUX
V
EE
Q
1
Q
1
V
BB
D
1b
D
1b
TOP VIEW
PLCC
J28-1
16
15
14
13
12
L
D
0a
D
2a
D
2a
D
2b
D
2b
SEL
2
H
2:1
MUX
Q
2
Q
2
L
PIN NAMES
Pin
D
n
[0:2], D
n
[0:2]
Function
Differential Data Inputs
Individual Select Input
Common Select Input
V
BB
Reference Output
Differential Data Outputs
V
CC
to Output
COMSEL
V
BB
SEL
COMSEL
V
BB
Q[0:2], Q[0:2]
V
CCO
SEL
0
V
CCO
Rev.: C
D
0a
V
BB
D
0b
D
0b
Amendment: /1
1
Issue Date: February, 1998

SY10E457JCTR Related Products

SY10E457JCTR SY10E457JC SY10E457 SY100E457JCTR SY100E457JC
Description TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER
Is it Rohs certified? incompatible incompatible - incompatible incompatible
Maker Microchip Microchip - Microchip Microchip
package instruction QCCJ, LDCC28,.5SQ QCCJ, LDCC28,.5SQ - QCCJ, LDCC28,.5SQ QCCJ, LDCC28,.5SQ
Reach Compliance Code _compli _compli - _compli _compli
series 10E 10E - 100E 100E
JESD-30 code S-PQCC-J28 S-PQCC-J28 - S-PQCC-J28 S-PQCC-J28
JESD-609 code e0 e0 - e0 e0
Logic integrated circuit type MULTIPLEXER MULTIPLEXER - MULTIPLEXER MULTIPLEXER
Number of functions 3 3 - 3 3
Number of entries 2 2 - 2 2
Output times 1 1 - 1 1
Number of terminals 28 28 - 28 28
Maximum operating temperature 70 °C 85 °C - 70 °C 85 °C
Output characteristics OPEN-EMITTER OPEN-EMITTER - OPEN-EMITTER OPEN-EMITTER
Output polarity COMPLEMENTARY COMPLEMENTARY - COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ QCCJ - QCCJ QCCJ
Encapsulate equivalent code LDCC28,.5SQ LDCC28,.5SQ - LDCC28,.5SQ LDCC28,.5SQ
Package shape SQUARE SQUARE - SQUARE SQUARE
Package form CHIP CARRIER CHIP CARRIER - CHIP CARRIER CHIP CARRIER
power supply -5.2 V -5.2 V - -4.5 V -4.5 V
Maximum supply current (ICC) 110 mA 110 mA - 127 mA 127 mA
Prop。Delay @ Nom-Su 0.7 ns 0.7 ns - 0.7 ns 0.7 ns
propagation delay (tpd) 0.7 ns 0.75 ns - 0.7 ns 0.75 ns
Certification status Not Qualified Not Qualified - Not Qualified Not Qualified
surface mount YES YES - YES YES
technology ECL ECL - ECL ECL
Temperature level COMMERCIAL OTHER - COMMERCIAL OTHER
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn/Pb) - Tin/Lead (Sn85Pb15) Tin/Lead (Sn/Pb)
Terminal form J BEND J BEND - J BEND J BEND
Terminal pitch 1.27 mm 1.27 mm - 1.27 mm 1.27 mm
Terminal location QUAD QUAD - QUAD QUAD
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