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SY10E337JZ

Description
3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER
Categorylogic    logic   
File Size65KB,5 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric Compare View All

SY10E337JZ Overview

3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER

SY10E337JZ Parametric

Parameter NameAttribute value
MakerMicrochip
Parts packaging codeQLCC
package instructionQCCJ,
Contacts28
Reach Compliance Codeunknown
series10E
JESD-30 codeS-PQCC-J28
JESD-609 codee3
length11.48 mm
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
Number of digits3
Number of functions1
Number of ports2
Number of terminals28
Maximum operating temperature85 °C
Minimum operating temperature
Output characteristicsOPEN-EMITTER WITH CUT-OFF
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Package shapeSQUARE
Package formCHIP CARRIER
propagation delay (tpd)1 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
surface mountYES
technologyECL
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceMATTE TIN
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
width11.48 mm
Micrel, Inc.
3-BIT SCANNABLE
REGISTERED BUS
TRANSCEIVER
DESCRIPTION
SY10E337
SY100E337
SY10E337
SY100E337
FEATURES
s
s
s
s
s
1500ps max. clock to bus (data transmit)
1000ps max. clock to Q (data receive)
Extended 100E V
EE
range of –4.2V to –5.5V
25
cutoff bus outputs
50
receiver outputs
s
Scannable implementation of E336
s
Synchronous and asynchronous bus enables
s
Non-inverting data path
s
Bus outputs feature internal edge slow-down
capacitors
s
Additional package ground pins
s
Fully compatible with industry standard 10KH,
100K ECL levels
s
Internal 75K
input pulldown resistors
s
Fully compatible with Motorola MC10E/100E337
s
Available in 28-pin PLCC package
PIN NAMES
Pin
A
0
–A
2
B
0
–B
2
S-IN
TEN, REN
SCAN
ABUSDIS
SBUSEN
SYNCEN
CLK
BUS
0
–BUS
2
Q
0
–Q
2
V
CCO
Function
Data Inputs A
Data Inputs B
Serial (Scan) Data Input
LOAD/HOLD Controls
Scan Control
Asynchronous Bus Disable
Synchronous Bus Enable
Synchronous Enable Control
Clock
25Ω Cutoff BUS Outputs
Receive Data Outputs (Q
2
serves as
SCAN_OUT in scan mode)
V
CC
to Output
The SY10/100E337 are 3-bit registered bus transceivers
with scan designed for use in new, high- performance ECL
systems. The bus outputs (BUS
0
–BUS
2
) are designed to
drive a 25Ω bus; the receive outputs (Q
0
–Q
2
) are designed
for 50Ω. The bus outputs feature a normal logic HIGH level
(V
OH
) and a cutoff LOW level of –2.0V and the output
emitter-follower is “off”, presenting a high impedance to the
bus. The bus outputs also feature edge slow-down
capacitors.
Both drive and receive sides feature the same logic,
including a loopback path to hold data. The LOAD/HOLD
function is controlled by Transmit Enable (TEN) and Receive
Enable (REN) on the transmit and receive sides,
respectively, with a HIGH selecting LOAD. The
implementation of the E337 Receive Enable differs from
that of the E336.
A synchronous bus enable (SBUSEN) is provided for
normal, non-scan operation. The asynchronous bus disable
(ABUSDIS) disables the bus for scan mode.
The SYNCEN input allows either synchronous or
asynchronous re-enabling after disabling with ABUSDIS.
An alternative use is asynchronous-only operation with
ABUSDIS, in which case SYNCEN is tied LOW. SYNCEN
is implemented as an overriding SET control to the enable
flip-flop.
Scan mode is selected by a logic HIGH at the SCAN
input. Scan input data is shifted in through S-IN, and output
data appears at the Q
2
output.
All registers are clocked on the rising edge of CLK.
Additional lead-frame grounding is provided through the
ground pins (GND) which should be connected to 0V. The
GND pins are not electrically connected to the chip.
M9999-032206
hbwhelp@micrel.com or (408) 955-1690
Rev.: F
Amendment: /0
1
Issue Date: March 2006

SY10E337JZ Related Products

SY10E337JZ SY100E337 SY10E337_06 SY10E337JZTR SY100E337JZTR SY100E337JZ
Description 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER 3-BIT SCANNABLE REGISTERED BUS TRANSCEIVER
Parts packaging code QLCC - - QLCC QLCC QLCC
package instruction QCCJ, - - QCCJ, QCCJ, QCCJ,
Contacts 28 - - 28 28 28
Reach Compliance Code unknown - - compli compli unknow
series 10E - - 10E 100E 100E
JESD-30 code S-PQCC-J28 - - S-PQCC-J28 S-PQCC-J28 S-PQCC-J28
JESD-609 code e3 - - e3 e3 e3
length 11.48 mm - - 11.48 mm 11.48 mm 11.48 mm
Logic integrated circuit type REGISTERED BUS TRANSCEIVER - - REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
Number of digits 3 - - 3 3 3
Number of functions 1 - - 1 1 1
Number of ports 2 - - 2 2 2
Number of terminals 28 - - 28 28 28
Maximum operating temperature 85 °C - - 85 °C 85 °C 85 °C
Output characteristics OPEN-EMITTER WITH CUT-OFF - - OPEN-EMITTER WITH CUT-OFF OPEN-EMITTER WITH CUT-OFF OPEN-EMITTER WITH CUT-OFF
Output polarity TRUE - - TRUE TRUE TRUE
Package body material PLASTIC/EPOXY - - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ - - QCCJ QCCJ QCCJ
Package shape SQUARE - - SQUARE SQUARE SQUARE
Package form CHIP CARRIER - - CHIP CARRIER CHIP CARRIER CHIP CARRIER
propagation delay (tpd) 1 ns - - 1 ns 1 ns 1 ns
Certification status Not Qualified - - Not Qualified Not Qualified Not Qualified
Maximum seat height 4.57 mm - - 4.57 mm 4.57 mm 4.57 mm
surface mount YES - - YES YES YES
technology ECL - - ECL ECL ECL
Temperature level COMMERCIAL EXTENDED - - COMMERCIAL EXTENDED COMMERCIAL EXTENDED COMMERCIAL EXTENDED
Terminal surface MATTE TIN - - MATTE TIN MATTE TIN MATTE TIN
Terminal form J BEND - - J BEND J BEND J BEND
Terminal pitch 1.27 mm - - 1.27 mm 1.27 mm 1.27 mm
Terminal location QUAD - - QUAD QUAD QUAD
width 11.48 mm - - 11.48 mm 11.48 mm 11.48 mm
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