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SY100EL16VCZITR

Description
ENHANCED DIFFERENTIAL RECEIVER
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size157KB,9 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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SY100EL16VCZITR Overview

ENHANCED DIFFERENTIAL RECEIVER

SY100EL16VCZITR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMicrochip
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Reach Compliance Code_compli
ECCN codeEAR99
Differential outputNO
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsGENERAL PURPOSE
JESD-30 codeR-PDSO-G8
JESD-609 codee0
length4.93 mm
Humidity sensitivity level1
Nominal negative supply voltage-3.3 V
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)240
power supply-3.0/-5.5 V
Certification statusNot Qualified
Maximum receive delay0.65 ns
Number of receiver bits1
Maximum seat height1.73 mm
Maximum slew rate46 mA
surface mountYES
technologyECL
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.94 mm
ENHANCED
DIFFERENTIAL
RECEIVER
FEATURES
s
s
s
s
3.3V and 5V power supply options
250ps propagation delay
Very high voltage gain vs. standard EL16 or EL16V
Ideal for Pulse Amplifier and Limiting Amplifier
applications
SY10EL16VA-VF
SY100EL16VA-VF
DESCRIPTION
The SY10/100EL16VA-VF are differential receivers.
The devices are equivalent to SY10/100EL16 or SY10/
100EL16V with enhanced capabilities. The Q
HG
, /Q
HG
outputs have a DC gain several times larger than the DC
gain of the Q output.
The SY10/100EL16VA have an identical pinout to the
SY10/100EL16 or SY10/100EL16V. It provides a V
BB
output for either single-ended application or as a DC
bias for AC coupling to the device.
The SY10/100EL16VB are very similar to the SY10/
100EL16VA. The /Q output is provided for feedback
purposes.
The SY10/100EL16VC provides an /EN input which is
synchronized with the data input (D) signal in a way that
provides glitchless gating of the Q
HG
and /Q
HG
outputs. When
the /EN signal is LOW, the input is passed to the outputs and
the data output equals the data input. When the data input is
HIGH and the /EN goes HIGH, it will force the Q
HG
LOW and
the /Q
HG
HIGH on the next negative transition of the data
input. If the data input is LOW when the /EN goes HIGH, the
next data transition to a HIGH is ignored and Q
HG
remains
LOW and /Q
HG
remains HIGH. The next positive transition of
the data input is not passed on to the data outputs under these
conditions. The Q
HG
and /Q
HG
outputs remain in their dis-
abled state as long as the /EN input is held HIGH. The /EN
input has no influence on the /Q output and the data input is
passed on (inverted) to this output whether /EN is HIGH or
LOW. This configuration is ideal for crystal oscillator applica-
tions, where the oscillator can be free running and gated on
and off synchronously without adding extra counts to the
output.
The SY10/100EL16VD provides the flexibility of all the
combinations in DIE form, in 16-pin 150mil SOIC package or
in 10-pin MSOP package. The 16-pin SOIC and 10-pin MSOP
packages are ideal for prototyping DIE applications.
The SY10/100EL16VE are similar to the SY10/100EL16VB
where the Q, /Q output is made available differently. In this
package option, V
BB
is no longer provided.
The SY10/100EL16VF are similar to the SY10/100EL16VC,
offering the D, /D inputs rather than the V
BB
output.
s
Data synchronous Enable/Disable (/EN) on Q
HG
and
/Q
HG
provides for complete glitchless gating of the
outputs
s
Ideal for gating timing signals
s
Complete solution for high quality, high frequency
crystal oscillator applications
s
Internal 75K Ohm input pull-down resistors
s
Available in both 8 and 16-pin SOIC package; 8 and
10-pin (3mm) MSOP and in DIE form
PIN NAMES
Pin
D
Q
Q
HG
V
BB
/EN
Data Inputs
Data Outputs
Data Outputs w/High Gain
Reference Voltage Output
Enable Input
Function
TRUTH TABLE
/EN
0
1
Data
Logic Low
QHG Output
Rev.: L
Amendment: /1
1
Issue Date: July 2000

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