STR912FAW34X6 datasheet, PDF - EEWORLD Datasheet

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STR912FAW34X6: Description32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, PBGA144; CategoryThe embedded processor and controller Microcontrollers and processors; File Size715KB，78 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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STR912FAW34X6 Overview

32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, PBGA144

STR912FAW34X6 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	14 X 14 MM, 0.40 MM PITCH, LQFP-128
Contacts	128
Reach Compliance Code	compli
Has ADC	YES
Other features	ALSO REQUIRES 3.3V SUPPLY
Address bus width	24
bit size	32
CPU series	ARM7
maximum clock frequency	25 MHz
DAC channel	NO
DMA channel	YES
External data bus width	16
JESD-30 code	S-PQFP-G128
length	14 mm
Number of I/O lines	80
Number of terminals	128
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP128,.64SQ,16
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3/3.3 V
Certification status	Not Qualified
RAM (bytes)	65536
rom(word)	524288
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	96 MHz
Maximum supply voltage	2 V
Minimum supply voltage	1.65 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.4 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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STR91xFA

ARM966E-S™ 16/32-Bit Flash MCU with Ethernet, USB, CAN,

AC motor control, 4 timers, ADC, RTC, DMA

PRELIMINARY DATA

Features

■

16/32-bit 96 MHz ARM9E based MCU

LQFP80 12 x12mm

LQFP128 14 x 14mm

– ARM966E-S RISC core: Harvard archi-

tecture, 5-stage pipeline, Tightly-Coupled

Memories (SRAM and Flash)

– STR91xFA implementation of core adds

high-speed burst Flash memory interface,

instruction prefetch queue, branch cache

– Up to 96 MIPS directly from Flash memory

– Single-cycle DSP instructions are supported

– Binary compatible with 16/32-bit ARM7 code

■

Dual burst Flash memories, 32-bits wide

– 256KB/512KB Main Flash, 32KB 2nd Flash

– Sequential Burst operation up to 96 MHz

– 100K min erase cycles, 20 yr min retention

■

SRAM, 32-bits wide

– 64K or 96K bytes, optional battery backup

■

9 programmable DMA channels

– One for Ethernet, 8 programmable channels

■

Clock, reset, and supply management

– Two supplies required. Core: 1.8 V +/-10%,

I/O: 2.7 to 3.6 V

– Internal oscillator operating with external

4-25 MHz crystal

– Internal PLL up to 96MHz

– Real-time clock provides calendar functions,

tamper detection, and wake-up functions

– Reset Supervisor monitors voltage supplies,

watchdog timer, wake-up unit, ext. reset

– Brown-out monitor for early warning interrupt

– Run, Idle, and Sleep Mode as low as 50 uA

■

Operating temperature -40 to +85°C

■

LFBGA144 10 x 10 x 1.7

■

10 Communication interfaces

– 10/100 Ethernet MAC with DMA and MII port

– USB Full-speed (12 Mbps) slave device

– CAN interface (2.0B Active)

– 3 16550-style UARTs with IrDA protocol

– 2 Fast I

C™, 400 kHz

– 2 channels for SPI™, SSI™, or Microwire™

■

External Memory Interface (EMI)

– 8- or 16-bit data

– Up to 24-bit addressing

– Static Async modes for LQFP128 packages

– Additional Burst Synchronous modes for

LFBGA144 packages

■

Up to 80 I/O pins (muxed with interfaces)

– 5 V tolerant, 16 have high sink current

(8 mA)

– Bit-wise manipulation of pins within a port

■

16-bit standard timers (TIM)

– 4 timers each with 2 input capture, 2 output

compare, PWM and pulse count modes

■

3-Phase induction motor controller (IMC)

– 3 pairs of PWM outputs, adjustable centers

– Emergency stop, dead-time gen, tach input

■

JTAG interface with boundary scan

– ARM EmbeddedICE® RT for debugging

– In-System Programming (ISP) of Flash

■

Embedded trace module (ARM ETM9)

– Hi-speed instruction tracing, 9-pin interface

Vectored interrupt controller (VIC)

– 32 IRQ vectors, 30 intr pins, any can be FIQ

– Branch cache minimizes interrupt latency

■

8-channel, 10-bit A/D converter (ADC)

– 0 to 3.6V range, 0.7 usec conversion

– DMA capability

May 2007

Rev 1

1/78

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

www.st.com

STR91xFA

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1

2.2

2.3

2.4

System-in-a-Package (SiP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Package choice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

ARM966E-S CPU core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Burst Flash memory interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4.1

2.4.2

2.4.3

Pre-Fetch Queue (PFQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Branch Cache (BC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Management of literals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.5

SRAM (64K or 96K Bytes) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.5.1

2.5.2

Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Battery backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.6

2.7

DMA data movement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Non-volatile memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.7.1

2.7.2

Primary Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Secondary Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.8

2.9

One-time-programmable (OTP) memory . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.8.1

Product ID and revision level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Vectored interrupt controller (VIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.9.1

2.9.2

2.9.3

FIQ handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

IRQ handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Interrupt sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.10

Clock control unit (CCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.10.1 Master clock sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.10.2 Reference clock (RCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.10.3 AHB clock (HCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.10.4 APB clock (PCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.10.5 Flash memory interface clock (FMICLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.10.6 Baud rate clock (BRCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.10.7 External memory interface bus clock (BCLK) . . . . . . . . . . . . . . . . . . . . . . . . 16

2.10.8 USB interface clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.10.9 Ethernet MAC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

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STR91xFA

2.10.10 External RTC calibration clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.10.11 Operation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.11

Flexible power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.11.1 Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.11.2 Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.11.3 Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.12

Voltage supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.12.1 Independent A/D converter supply and reference voltage . . . . . . . . . . . . . . . 18

2.12.2 Battery supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.13

System supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.13.1 Supply voltage brownout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.13.2 Supply voltage dropout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.13.3 Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.13.4 External RESET_INn pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.13.5 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.13.6 JTAG debug command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.13.7 Tamper detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.14

2.15

Real-time clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

JTAG interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.15.1 In-system-programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.15.2 Boundary scan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.15.3 CPU debug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.15.4 JTAG security bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

2.16

2.17

2.18

Embedded trace module (ARM ETM9, v. r2p2) . . . . . . . . . . . . . . . . . . . . . . 23

Ethernet MAC interface with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

USB 2.0 slave device interface with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2.18.1 Packet buffer interface (PBI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.18.2 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.18.3 Suspend mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.19

2.20

2.21

2.22

CAN 2.0B interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

UART interfaces with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2.20.1 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

I2C interfaces with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2.21.1 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

SSP interfaces (SPI, SSI, and Microwire) with DMA . . . . . . . . . . . . . . . . . . . 27

2.22.1 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3/78

STR91xFA

2.23

2.24

2.25

2.26

2.27

General purpose I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

A/D converter (ADC) with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.24.1 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Standard timers (TIM) with DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.25.1 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Three-phase induction motor controller (IMC) . . . . . . . . . . . . . . . . . . . . . . . 30

External memory interface (EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Related documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.1

4.2

LFBGA144 ball connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Default pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

5.1

5.2

5.3

5.4

Buffered and non-buffered writes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

System (AHB) and peripheral (APB) buses . . . . . . . . . . . . . . . . . . . . . . . . . 44

SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Two independent Flash memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

5.4.1

5.4.2

Default configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Optional configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

6.1

6.2

6.3

6.4

6.5

6.6

6.7

6.8

6.9

6.10

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

6.2.1

Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . 49

LVD electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

6.3.1

LVD delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

RESET_INn and power-on-reset characteristics . . . . . . . . . . . . . . . . . . . . . 54

Main oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

RTC oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

PLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

SRAM characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

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STR91xFA

6.11

6.12

Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

6.12.1 Functional EMS (Electro Magnetic Susceptibility) . . . . . . . . . . . . . . . . . . . . . 57

6.12.2 Electro Magnetic Interference (EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

6.12.3 Absolute Maximum Ratings (Electrical Sensitivity) . . . . . . . . . . . . . . . . . . . . 58

6.12.4 Electro-Static Discharge (ESD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

6.12.5 Static and Dynamic Latch-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

6.12.6 Designing hardened software to avoid noise problems . . . . . . . . . . . . . . . . . 58

6.12.7 Electrical Sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

6.13

6.14

6.15

External memory bus timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

ADC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Communication interface electrical characteristics . . . . . . . . . . . . . . . . . . . . 65

6.15.1 10/100 Ethernet MAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . 65

6.15.2 USB electrical interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

6.15.3 CAN interface electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

6.15.4 I2C electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

6.15.5 SPI electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

7.1

Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

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STR912FAW34X6 Related Products

	STR912FAW34X6	STR91XFA
Description	32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, PBGA144	32-BIT, FLASH, 96 MHz, RISC MICROCONTROLLER, PBGA144
Address bus width	24	0.0
DAC channel	NO	NO
DMA channel	YES	YES
External data bus width	16	0.0
length	14 mm	10 mm
Number of terminals	128	144
Maximum operating temperature	85 °C	85 Cel
Minimum operating temperature	-40 °C	-40 Cel
PWM channel	YES	YES
Maximum supply voltage	2 V	2 V
Minimum supply voltage	1.65 V	1.65 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	BALL
Terminal location	QUAD	BOTTOM
width	14 mm	10 mm

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Please note when posting information: To facilitate downloading, please pay attention to the following when uploading materials: 1. Check whether the resource exists through the "search box" in the upper right corner of the forum; 2. Desc...; soso Suggestions & Announcements

Show off the PSSD mobile hard drive: Last week, a small mechanical hard drive that I usually use suddenly broke down. Because the built-in hard drive of the laptop has a small capacity of only 256G, there is not much space left, so I use...; dcexpert Talking

It's hard to be a man, it's harder to be an electronic man, and it's even harder to be an electronic man without a backstage!: I'm afraid that no place can bear more than men in the city. Although some are leisurely, most men are trying to get closer to the center of the city little by little under various pressures. In the e...; 蜗居 Talking

ST's three French factories are on strike, and the chip shortage may become more serious: Due to the impact of the epidemic, upstream chip manufacturers were too conservative in their estimates of market demand in the second half of the year, resulting in a shortage of many chips when the ...; dcexpert Talking

OFDM in detail: It contains information on the scheme behind the operation of OFDM modulation and demodulation. It also includes some simulation figures if 4QAM modulation is used....; qaz1999 RF/Wirelessly

What should I pay attention to when migrating a project from Embedded Studio V4 to V5?: backgroundWith the update of Embedded Studio to version 5, you can use the new SEGGER compiler, SEGGER runtime library and the new SEGGER linker to get smaller and faster code. Therefore, if you have ...; MamoYU Embedded System

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