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74ABT899CSC

Description
TXRX W/GENERATOR&CHECKER; 28SOIC
Categorysemiconductor    logic   
File Size127KB,16 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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74ABT899CSC Overview

TXRX W/GENERATOR&CHECKER; 28SOIC

74ABT899CSC Parametric

Parameter NameAttribute value
logical typeParity generator/checker
voltage4.5 V ~ 5.5 V
Number of digits9
Operating temperature-40°C ~ 85°C
Installation typesurface mount
Package/casing28-SOIC (0.295", 7.50mm wide)
Supplier device packaging28-SOIC
74ABT899 9-Bit Latchable Transceiver with Parity Generator/Checker
November 1992
Revised January 1999
74ABT899
9-Bit Latchable Transceiver
with Parity Generator/Checker
General Description
The ABT899 is a 9-bit to 9-bit parity transceiver with trans-
parent latches. The device can operate as a feed-through
transceiver or it can generate/check parity from the 8-bit
data busses in either direction.
The ABT899 features independent latch enables for the A-
to-B direction and the B-to-A direction, a select pin for
ODD/EVEN parity, and separate error signal output pins for
checking parity.
s
Ability to simultaneously generate and check parity
s
May be used in systems applications in place of the
543 and 280
s
May be used in system applications in place of the
657 and 373 (no need to change T/R to check parity)
s
Guaranteed output skew
s
Guaranteed multiple output switching specifications
s
Output switching specified for both 50 pF and
250 pF loads
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed latchup protection
s
High impedance glitch free bus loading during entire
power up and power down cycle
s
Nondestructive hot insertion capability
s
Disable time less than enable time to avoid bus
contention
Features
s
Latchable transceiver with output sink of 64 mA
s
Option to select generate parity and check or
“feed-through” data/parity in directions A-to-B or B-to-A
s
Independent latch enables for A-to-B and B-to-A
directions
s
Select pin for ODD/EVEN parity
s
ERRA and ERRB output pins for parity checking
Ordering Code:
Order Number
74ABT899CSC
74ABT899CMSA
74ABT899CQC
Package Number
M28B
MSA28
V28A
Package Description
28-Lead Small Outline Integrated Circuit (SOIC), MS-013, 0.300” Wide Body
28-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450” Square
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignment
for PLCC
Pin Assignment for
SOIC and SSOP
© 1999 Fairchild Semiconductor Corporation
DS011509.prf
www.fairchildsemi.com

74ABT899CSC Related Products

74ABT899CSC 74ABT899CSCX 74ABT899CMSA 74ABT899CMSAX 74ABT899CQCX 74ABT899CQC
Description TXRX W/GENERATOR&CHECKER; 28SOIC TXRX W/GENERATOR&CHECKER; 28SOIC TXRX W/GENERATOR&CHECKER; 28SSOP TXRX W/GENERATOR&CHECKER; 28SSOP TXRX W/GENERATOR&CHECKER; 28PLCC TXRX W/GENERATOR&CHECKER; 28PLCC
logical type Parity generator/checker Parity generator/checker Parity generator/checker Parity generator/checker Parity generator/checker Parity generator/checker
voltage 4.5 V ~ 5.5 V 4.5 V ~ 5.5 V 4.5 V ~ 5.5 V 4.5 V ~ 5.5 V 4.5 V ~ 5.5 V 4.5 V ~ 5.5 V
Number of digits 9 9 9 9 9 9
Operating temperature -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C -40°C ~ 85°C
Installation type surface mount surface mount surface mount surface mount surface mount surface mount
Package/casing 28-SOIC (0.295", 7.50mm wide) 28-SOIC (0.295", 7.50mm wide) 28-SSOP (0.209", 5.30mm wide) 28-SSOP (0.209", 5.30mm wide) 28-LCC (J-lead) 28-LCC (J-lead)
Supplier device packaging 28-SOIC 28-SOIC 28-SSOP 28-SSOP 28-PLCC(11.5x11.5) 28-PLCC(11.5x11.5)
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