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74VCXH162373MTD

Description
IC LATCH TRANSP 16BIT LV 48TSSOP
Categorysemiconductor    logic   
File Size150KB,9 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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74VCXH162373MTD Overview

IC LATCH TRANSP 16BIT LV 48TSSOP

74VCXH162373MTD Parametric

Parameter NameAttribute value
logical typeD type transparent latch
circuit8:8
Output typeThree states
Voltage - Power1.4 V ~ 3.6 V
independent circuit2
Delay time - propagation1ns
Current - output high, low12mA,12mA
Operating temperature-40°C ~ 85°C
Installation typesurface mount
Package/casing48-TFSOP (0.240", 6.10mm wide)
Supplier device packaging48-TSSOP
74VCXH162373 Low Voltage 16-Bit Transparent Latch with Bushold and 26: Series Resistors in Outputs
January 2000
Revised June 2005
74VCXH162373
Low Voltage 16-Bit Transparent Latch with Bushold
and 26: Series Resistors in Outputs
General Description
The VCXH162373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch enable
(LE) is HIGH. When LE is LOW, the data that meets the
setup time is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the out-
puts are in a high impedance state.
The VCXH162373 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The VCXH162373 is also designed with 26
:
series resis-
tors in the outputs. This design reduces line noise in appli-
cations such as memory address driver, clock drivers and
bus transceivers/transmitters.
The 74VCXH162373 is designed for low voltage (1.4V to
3.6V) V
CC
applications with output compatibility up to 3.6V.
The 74VCXH162373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant control inputs and outputs
s
Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
s
26
:
series resistors in outputs
s
t
PD
(I
n
to O
n
)
3.3 ns max for 3.0V to 3.6V V
CC
s
Static Drive (I
OH
/I
OL
)
r
12 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 300 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
Ordering Code:
Ordering Number
74VCXH162373MTD
74VCXH162373MTX
(Note 1)
Package
Number
MTD48
MTD48
Package Description
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TUBES]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[TAPE and REEL]
Note 1:
Use this Order Number to receive devices in Tape and Reel.
Logic Symbol
Pin Descriptions
Pin Names
OE
n
LE
n
I
0
–I
15
O
0
–O
15
Description
Output Enable Input (Active LOW)
Latch Enable Input
Bushold Inputs
Outputs
© 2005 Fairchild Semiconductor Corporation
DS500227
www.fairchildsemi.com

74VCXH162373MTD Related Products

74VCXH162373MTD 74VCXH162373MTX
Description IC LATCH TRANSP 16BIT LV 48TSSOP IC LATCH TRANSP 16BIT LV 48TSSOP
logical type D type transparent latch D type transparent latch
circuit 8:8 8:8
Output type Three states Three states
Voltage - Power 1.4 V ~ 3.6 V 1.4 V ~ 3.6 V
independent circuit 2 2
Delay time - propagation 1ns 1ns
Current - output high, low 12mA,12mA 12mA,12mA
Operating temperature -40°C ~ 85°C -40°C ~ 85°C
Installation type surface mount surface mount
Package/casing 48-TFSOP (0.240", 6.10mm wide) 48-TFSOP (0.240", 6.10mm wide)
Supplier device packaging 48-TSSOP 48-TSSOP
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