LP3891ET-1.2/NOPB datasheet, PDF

Datasheet> All Categories > Power/power management> The power supply circuit> LP3891ET-1.2/NOPB

LP3891ET-1.2/NOPB: DescriptionIC REG LINEAR 1.2V 800MA TO220-5; CategoryPower/power management The power supply circuit; File Size1MB，21 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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LP3891ET-1.2/NOPB Overview

IC REG LINEAR 1.2V 800MA TO220-5

LP3891ET-1.2/NOPB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Texas Instruments
package instruction	ZIP, ZIP5,.15,.17,67TB
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
Adjustability	FIXED
Maximum drop-back voltage 1	0.4 V
Nominal dropback voltage 1	0.1 V
Maximum absolute input voltage	6 V
Maximum input voltage	5.5 V
Minimum input voltage	1.616 V
JESD-30 code	R-PZFM-T5
JESD-609 code	e3
Humidity sensitivity level	1
Number of functions	1
Output times	1
Number of terminals	5
Working temperatureTJ-Max	125 °C
Working temperature TJ-Min	-40 °C
Maximum output current 1	0.8 A
Maximum output voltage 1	1.246 V
Minimum output voltage 1	1.186 V
Nominal output voltage 1	1.216 V
Package body material	PLASTIC/EPOXY
encapsulated code	ZIP
Encapsulate equivalent code	ZIP5,.15,.17,67TB
Package shape	RECTANGULAR
Package form	FLANGE MOUNT
method of packing	RAIL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Regulator type	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
surface mount	NO
technology	CMOS
Terminal surface	Matte Tin (Sn)
Terminal form	THROUGH-HOLE
Terminal pitch	1.7 mm
Terminal location	ZIG-ZAG
Maximum time at peak reflow temperature	40
Maximum voltage tolerance	2.5%
Base Number Matches	1

LP3891ET-1.2/NOPB Related Products

	LP3891ET-1.2/NOPB	LP3891ES-1.8/NOPB	LP3891ET-1.5/NOPB	LP3891ET-1.8/NOPB	LP3891EMR-1.5/NOPB
Description	IC REG LINEAR 1.2V 800MA TO220-5	IC REG LIN 1.8V 800MA DDPAK	IC REG LINEAR 1.5V 800MA TO220-5	IC REG LINEAR 1.8V 800MA TO220-5	IC REG LIN 1.5V 800MA 8SO PWRPAD
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
package instruction	ZIP, ZIP5,.15,.17,67TB	TO-263, SMSIP5H,.6,67TB	ZIP, ZIP5,.15,.17,67TB	ZIP, ZIP5,.15,.17,67TB	HLSOP, SOP8,.25
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
Adjustability	FIXED	FIXED	FIXED	FIXED	FIXED
Maximum drop-back voltage 1	0.4 V	0.4 V	0.4 V	0.4 V	0.43 V
Nominal dropback voltage 1	0.1 V	0.1 V	0.1 V	0.1 V	0.1 V
Maximum absolute input voltage	6 V	6 V	6 V	6 V	6 V
Maximum input voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum input voltage	1.616 V	2.2 V	1.9 V	2.2 V	1.93 V
JESD-30 code	R-PZFM-T5	R-PSSO-G5	R-PZFM-T5	R-PZFM-T5	R-PDSO-G8
JESD-609 code	e3	e3	e3	e3	e3
Humidity sensitivity level	1	3	1	1	3
Number of functions	1	1	1	1	1
Output times	1	1	1	1	1
Number of terminals	5	5	5	5	8
Working temperatureTJ-Max	125 °C	125 °C	125 °C	125 °C	125 °C
Working temperature TJ-Min	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Maximum output current 1	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A
Maximum output voltage 1	1.246 V	1.854 V	1.545 V	1.854 V	1.545 V
Minimum output voltage 1	1.186 V	1.746 V	1.455 V	1.746 V	1.455 V
Nominal output voltage 1	1.216 V	1.8 V	1.5 V	1.8 V	1.5 V
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	ZIP	TO-263	ZIP	ZIP	HLSOP
Encapsulate equivalent code	ZIP5,.15,.17,67TB	SMSIP5H,.6,67TB	ZIP5,.15,.17,67TB	ZIP5,.15,.17,67TB	SOP8,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLANGE MOUNT	SMALL OUTLINE	FLANGE MOUNT	FLANGE MOUNT	SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE
method of packing	RAIL	RAIL	RAIL	RAIL	RAIL
Peak Reflow Temperature (Celsius)	260	245	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Regulator type	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
surface mount	NO	YES	NO	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal surface	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	THROUGH-HOLE	GULL WING	THROUGH-HOLE	THROUGH-HOLE	GULL WING
Terminal pitch	1.7 mm	1.7 mm	1.7 mm	1.7 mm	1.27 mm
Terminal location	ZIG-ZAG	SINGLE	ZIG-ZAG	ZIG-ZAG	DUAL
Maximum time at peak reflow temperature	40	30	40	40	40
Maximum voltage tolerance	2.5%	3%	3%	3%	3%
Base Number Matches	1	1	1	1	1

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