ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101-B
1:1 Active HDMI™ ReDriver™ with Optimized Equalization
& I2C Buffer and RxTerm detection circuitry
Features
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Supply voltage, VDD = 3.3V ±5%
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Support
Description
Pericom Semiconductor’s PI3HDMI101-B 1:1 active ReDriver™
circuit is targeted for high-resolution video networks that are
based on DVI/HDMI™ standards and TMDS signal processing.
The PI3HDMI101-B is an active ReDriver with Hi-Z outputs.
The device receives differential signals from selected video com-
ponents and drives the video display unit. This solution also
provides a unique advanced pre-emphasis technique to increase
rise and fall times which are reduced during transmission across
long distances.
Each complete HDMI/DVI channel also has slower speed, side
band signals, that are required to be switched. Pericom’s solu-
tion provides a complete solution by integrating the side band
buffer together with the high speed buffer in a single solution.
Using Equalization at the input of each of the high speed chan-
nels, Pericom can successfully eliminate deterministic jitter
caused by long cables from the source to the sink. The elimina-
tion of the deterministic jitter allows the user to use much longer
cables (up to 25 meters).
The maximum DVI/HDMI Bandwidth of 2.5 Gbps provides 36-
bit DeepColor™ support, which is offered by HDMI revision 1.3.
The PI3HDMI101-B also provides enhanced robust ESD/EOS
protection of 8kV, which is required by many consumer video
networks today.
The Optimized Equalization provides the user a single optimal
setting that can provide HDMI compliance for all cable lengths: 1
meter to 20 meters and color depths of 8bit/ch, or 12bit/ch.
Pericom also offers the ability to fine tune the equalization set-
tings in situations where cable length is known. For example,
if 25 meter cable length is required, Pericom's solution can be
adjusted to 16dB EQ to accept 25 meter cable length.
Using Pericom's patent-pending Rx termination detection circuit,
PI3HDMI101-B can automatically disable its own input 50-Ohm
termination when no 50-Ohm termination is detected in the
HDMI Rx chipset. If a switch is used between the PI3HDMI101-B
and the HDMI Rx, our part can detect the 50-Ohm termination
in the switch to determine if our input should be off or on.
for both DVI and HDMI™ signals
both AC-coupled and DC-coupled inputs
DeepColor™
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Supports
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Supports
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High
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5V
Performance, up to 2.5 Gbps per channel
Tolerance on I
2
C path
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Integrated
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Integrated
50-ohm
(±10%)
termination resistors at each high
speed signal input
Rx termination detection circuit
output swing control
(400mV, 500mV, 600mV, 750mV, 1000mV)
Pre-Emphasis levels
(0dB, 1.5dB, 3.5dB, & 6.0dB, 9.0dB)
De-Emphasis
(0dB, -3.5dB, -6.0dB, -9.5dB)
Equalization
default setting will support all cable lengths
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Configurable
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Configurable
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Configurable
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Optimized
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Single
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8kV
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Hot
Contact ESD protection on all input data/clock channels
per IEC61000-4-2
insertion support on output high speed pins & SCL/SDA
pins only
delay ≤ 1ns
Impedance Outputs when disabled
(Pb-free & Green): 42-contact TQFN (ZH42)
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Propagation
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High
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Packaging
All trademarks are property of their respective owners.
13-0005
1
PS8956B
03/06/13
1:1 Active HDMITM ReDriver™ with Optimized Equalization
& I2C Buffer and RxTerm detection circuitry
Pin Configuration
IADJ
SCL_R
SDA_R
SDA_T
PI3HDMI101-B
EQ_S0
EQ_S1
GND
IN_CLK–
IN_CLK+
VDD
IN_D0–
IN_D0+
GND
IN_D1–
IN_D1+
VDD
IN_D2–
IN_D2+
GND
RxSENSE
DCC_EN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
42 41 40 39
GND
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
SCL_T
VDD
GND
OUT_CLK–
OUT_CLK+
VDD
OUT_D0–
OUT_D0+
GND
OUT_D1–
OUT_D1+
VDD
OUT_D2–
OUT_D2+
GND
VDD
OC_S3
18 19 20 21
OE
OC_S0
OC_S1
OC_S2
TMDS Receiver Block
Each high speed data and clock input has integrated equalization that can eliminate deterministic jitter caused by input cables.
All activity can be configured using pin strapping. The Rx block is designed to receive all relevant signals directly from the HDMI™
connector without any additional circuitry, 3 High speed TMDS data, 1 pixel clock, and DDC signals. TMDS channels have the fol-
lowing termination scheme for Rx Sense support. The switching between 50-Ohm termination vs. 250K-Ohm termination is done
automatically. The PI3HDMI101-B monitors the 50-Ohm termination in the Rx chipset behind our part, and when this 50-Ohm
termination is not present, we disable our 50-Ohm termination at our input.
DD
K-
IN_Dx+/-, IN_CLK+/-
All trademarks are property of their respective owners.
13-0005
2
PS8956B
03/06/13
1:1 Active HDMITM ReDriver™ with Optimized Equalization
& I2C Buffer and RxTerm detection circuitry
PI3HDMI101-B
Pin Description
Pin #
5
8
11
14
4
7
10
13
3, 9, 15, 24, 30, 36
18
41
40
6, 12, 16, 23, 27, 33, 37
34
31
28
25
35
32
29
26
1
2
19
20
21
22
17
38
39
42
Pin Name
IN_CLK+
IN_D0+
IN_D1+
IN_D2+
IN_CLK-
IN_D0-
IN_D1-
IN_D2-
GND
OE
SCL_R
SDA_R
V
DD
OUT_CLK+
OUT_D0+
OUT_D1+
OUT_D2+
OUT_CLK-
OUT_D0-
OUT_D1-
OUT_D2-
EQ_S0
EQ_S1
OC_S0
OC_S1
OC_S2
OC_S3
DDC_EN
SCL_T
SDA_T
IADJ
I/O
Description
I
TMDS Positive inputs
I
TMDS Negative inputs
P
I
I/O
I/O
P
Ground
Output Enable, Active LOW
DDC Clock , Source Side
DDC Data, Source Side
3.3V Power Supply
O
TMDS positive outputs
O
TMDS negative outputs
I
Equalizer controls, both pins with internal pull-ups
I
Output buffer controls
Note: All 4 pins have internal pull-ups
I
I/O
I/O
I
I
2
C path enable
DDC Clock, Sink side
DDC Data, Sink side
High/Low Voltage Selection, depends on I
2
C external pull-up
range
All trademarks are property of their respective owners.
13-0005
4
PS8956B
03/06/13
ARM Technology
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