IDT71V35781S166PFI8 datasheet, PDF

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IDT71V35781S166PFI8: DescriptionCache SRAM, 256KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100; Categorystorage; File Size280KB，22 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71V35781S166PFI8 Overview

Cache SRAM, 256KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100

IDT71V35781S166PFI8 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	14 X 20 MM, PLASTIC, TQFP-100
Contacts	100
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.A
Is Samacsys	N
Maximum access time	3.5 ns
Other features	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	166 MHz
I/O type	COMMON
JESD-30 code	R-PQFP-G100
JESD-609 code	e0
length	20 mm
memory density	4718592 bit
Memory IC Type	CACHE SRAM
memory width	18
Humidity sensitivity level	3
Number of functions	1
Number of terminals	100
word count	262144 words
character code	256000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX18
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP100,.63X.87
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.035 A
Minimum standby current	3.14 V
Maximum slew rate	0.33 mA
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	14 mm
Base Number Matches	1

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128K x 36, 256K x 18

3.3V Synchronous SRAMs

3.3V I/O, Pipelined Outputs

Burst Counter, Single Cycle Deselect

IDT71V35761S

IDT71V35781S

IDT71V35761SA

IDT71V35781SA

Features

128K x 36, 256K x 18 memory configurations

Supports high system speed:

Commercial:

– 200MHz 3.1ns clock access time

Commercial and Industrial:

– 183MHz 3.3ns clock access time

– 166MHz 3.5ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte write

enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

3.3V I/O

Optional - Boundary Scan JTAG Interface (IEEE 1149.1

compliant)

Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball

grid array

Description

The IDT71V35761/781 are high-speed SRAMs organized as

128K x 36/256K x 18. The IDT71V35761/781 SRAMs contain write, data,

address and control registers. Internal logic allows the SRAM to generate

a self-timed write based upon a decision which can be left until the end of

the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V35761/81 can provide four cycles of data

for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V35761/781 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array

(BGA) and 165 fine pitch ball grid array.

Input

Output

Input

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

N/A

Synchronous

Asynchronous

Synchronous

N/A

5301 tbl 01

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

TMS

TDI

TCK

TDO

TRST

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Test Clock

Test Data Output

JTAG Reset (Optional)

Sleep Mode

Data Input / Output

Core Power, I/O Power

Ground

NOTE:

and

are not applicable for the IDT71V35781.

JUNE 2003

DSC-5301/03

IDT71V35781S166PFI8 Related Products

	IDT71V35781S166PFI8	IDT71V35781S166BG8	IDT71V35781S183BGI8	IDT71V35781S166PF8	IDT71V35781S183BG8
Description	Cache SRAM, 256KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 3.5ns, CMOS, PBGA119, BGA-119	Cache SRAM, 256KX18, 3.3ns, CMOS, PBGA119, BGA-119	Cache SRAM, 256KX18, 3.5ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 3.3ns, CMOS, PBGA119, BGA-119
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFP	BGA	BGA	QFP	BGA
package instruction	14 X 20 MM, PLASTIC, TQFP-100	BGA-119	BGA-119	14 X 20 MM, PLASTIC, TQFP-100	BGA-119
Contacts	100	119	119	100	119
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	3.5 ns	3.5 ns	3.3 ns	3.5 ns	3.3 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	166 MHz	166 MHz	183 MHz	166 MHz	183 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-PQFP-G100	R-PBGA-B119	R-PBGA-B119	R-PQFP-G100	R-PBGA-B119
JESD-609 code	e0	e0	e0	e0	e0
length	20 mm	22 mm	22 mm	20 mm	22 mm
memory density	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
memory width	18	18	18	18	18
Humidity sensitivity level	3	3	3	3	3
Number of functions	1	1	1	1	1
Number of terminals	100	119	119	100	119
word count	262144 words	262144 words	262144 words	262144 words	262144 words
character code	256000	256000	256000	256000	256000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	70 °C	85 °C	70 °C	70 °C
organize	256KX18	256KX18	256KX18	256KX18	256KX18
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	BGA	BGA	LQFP	BGA
Encapsulate equivalent code	QFP100,.63X.87	BGA119,7X17,50	BGA119,7X17,50	QFP100,.63X.87	BGA119,7X17,50
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK, LOW PROFILE	GRID ARRAY	GRID ARRAY	FLATPACK, LOW PROFILE	GRID ARRAY
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	240	NOT SPECIFIED	NOT SPECIFIED	240	NOT SPECIFIED
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.6 mm	2.36 mm	2.36 mm	1.6 mm	2.36 mm
Maximum standby current	0.035 A	0.03 A	0.035 A	0.03 A	0.03 A
Minimum standby current	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V
Maximum slew rate	0.33 mA	0.32 mA	0.35 mA	0.32 mA	0.34 mA
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn63Pb37)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn63Pb37)
Terminal form	GULL WING	BALL	BALL	GULL WING	BALL
Terminal pitch	0.65 mm	1.27 mm	1.27 mm	0.65 mm	1.27 mm
Terminal location	QUAD	BOTTOM	BOTTOM	QUAD	BOTTOM
Maximum time at peak reflow temperature	20	NOT SPECIFIED	NOT SPECIFIED	20	NOT SPECIFIED
width	14 mm	14 mm	14 mm	14 mm	14 mm
Base Number Matches	1	1	1	1	1
Is Samacsys	N	-	-	N	N

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