†Peak Repetitive Forward or Reverse Blocking Current
(V
AK
= Rated V
DRM
or V
RRM
, Gate Open)
ON CHARACTERISTICS
†Peak Forward On−State Voltage (Note 2) (I
TM
= 24 A Peak)
†Gate Trigger Current (Continuous dc) (V
D
= 12 Vdc, R
L
= 100 Ohms)
† Gate Trigger Voltage (Continuous dc) (V
D
= 12 Vdc, R
L
= 100 Ohms)
Gate Non−Trigger Voltage (V
D
= 12 Vdc, R
L
= 100 Ohms, T
J
= 125°C)
† Holding Current (V
D
= 12 Vdc, Initiating Current = 200 mA, Gate Open)
Turn-On Time (I
TM
= 12 A, I
GT
= 40 mAdc, V
D
= Rated V
DRM
)
Turn-Off Time (V
D
= Rated V
DRM
)
DYNAMIC CHARACTERISTICS
Critical Rate−of−Rise of Off-State Voltage Exponential
(V
D
= Rated V
DRM
, T
J
= 125°C)
†Indicates JEDEC Registered Data
2. Pulse Test: Pulse Width
≤
300
msec,
Duty Cycle
≤
2%.
dv/dt
−
50
−
V/ms
(I
TM
= 12 A, I
R
= 12 A)
(I
TM
= 12 A, I
R
= 12 A, T
J
= 125°C)
V
TM
I
GT
V
GT
V
GD
I
H
t
gt
t
q
−
−
−
0.2
−
−
−
−
1.7
5.0
0.7
−
6.0
1.0
15
35
2.2
30
1.5
−
50
2.0
−
−
V
mA
V
V
mA
ms
ms
T
J
= 25°C
T
J
= 125°C
I
DRM
, I
RRM
−
−
−
−
10
2.0
mA
mA
Symbol
Min
Typ
Max
Unit
Voltage Current Characteristic of SCR
+ Current
Anode +
V
TM
Symbol
V
DRM
I
DRM
V
RRM
I
RRM
V
TM
I
H
Parameter
Peak Repetitive Off State Forward Voltage
Peak Forward Blocking Current
Peak Repetitive Off State Reverse Voltage
Peak Reverse Blocking Current
Peak On State Voltage
Holding Current
Reverse Blocking Region
(off state)
Reverse Avalanche Region
Anode
−
I
RRM
at V
RRM
on state
I
H
+ Voltage
I
DRM
at V
DRM
Forward Blocking Region
(off state)
TC, MAXIMUM ALLOWABLE CASE TEMPERATURE (
°
C)
130
125
120
115
110
105
dc
100
95
90
0
α
= 30°
60°
90°
180°
8.0
α
α
= CONDUCTION ANGLE
P(AV) , AVERAGE POWER (WATTS)
20
18
16
14
12
10
8.0
6.0
4.0
2.0
0
0
1.0
2.0
3.0
7.0
4.0
5.0
6.0
I
T(AV)
, AVERAGE ON‐STATE CURRENT (AMPS)
8.0
T
J
≈
125°C
α
α
= CONDUCTION ANGLE
α
= 30°
60°
180°
90°
dc
7.0
4.0
5.0
1.0
2.0
3.0
6.0
I
T(AV)
, AVERAGE ON‐STATE FORWARD CURRENT (AMPS)
Figure 1. Current Derating
Figure 2. Maximum On−State Power Dissipation
http://onsemi.com
2
2N6394 Series
100
70
50
30
20
iTM , INSTANTANEOUS ON-STATE CURRENT (AMPS)
T
J
= 25°C
125°C
10
7.0
5.0
3.0
2.0
100
1.0
0.7
0.5
0.3
0.2
I TSM , PEAK SURGE CURRENT (AMP)
95
90
85
80
75
70
65
60
55
50
1.0
SURGE IS PRECEDED AND
FOLLOWED BY RATED CURRENT
2.0
3.0
4.0
NUMBER OF CYCLES
6.0
8.0
10
T
J
= 125°C
f = 60 Hz
1 CYCLE
0.1
0.4
1.2
2.0
2.8
3.6
4.4
5.2
v
TH
, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
6.0
Figure 3. On−State Characteristics
Figure 4. Maximum Non−Repetitive Surge Current
1.0
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
0.01
0.1
0.2 0.3
0.5
1.0
2.0 3.0
5.0
10
20 30
50
t, TIME (ms)
100
200 300
500
1.0 k
2.0 k 3.0 k 5.0 k
10
Z
qJC(t)
= R
qJC
•
r(t)
Figure 5. Thermal Response
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3
2N6394 Series
TYPICAL CHARACTERISTICS
I GT, GATE TRIGGER CURRENT (NORMALIZED)
300
200
IGTM , PEAK GATE CURRENT (mA)
100
70
50
30
20
T
J
= -40°C
25°C
100°C
3.0
OFF‐STATE VOLTAGE = 12 V
2.0
OFF‐STATE VOLTAGE = 12 V
1.0
0.7
0.5
10
7.0
5.0
3.0
0.2
0.5
1.0
2.0
5.0
10
20
PULSE WIDTH (ms)
50
100
200
0.3
-40 -20
0
20
40
60
80
100 120
T
J
, JUNCTION TEMPERATURE (°C)
140 160
Figure 6. Typical Gate Trigger Current
versus Pulse Width
1.1
VGT, GATE TRIGGER VOLTAGE (VOLTS)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-60 -40
3.0
-20
0
20
40
60
80
100
120
140
OFF‐STATE VOLTAGE = 12 V
IH , HOLDING CURRENT (mA)
30
Figure 7. Typical Gate Trigger Current
versus Temperature
OFF‐STATE VOLTAGE = 12 V
20
10
7.0
5.0
-60 -40
-20
0
20
40
60
80
100
120 140
T
J
, JUNCTION TEMPERATURE (°C)
T
J
, JUNCTION TEMPERATURE (°C)
Figure 8. Typical Gate Trigger Voltage
versus Temperature
ORDERING INFORMATION
Device
2N6394G
2N6394TG
2N6395G
2N6397G
2N6397TG
2N6399G
2N6399TG
TO−220AB
(Pb−Free)
Package
Figure 9. Typical Holding Current
versus Temperature
Shipping**
500 Units / Bulk
50 Units / Rail
500 Units / Bulk
500 Units / Bulk
50 Units / Rail
500 Units / Bulk
50 Units / Rail
**For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
2N6394 Series
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−07
ISSUE AA
−T−
B
F
T
C
S
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.014
0.022
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
---
---
0.080
CATHODE
ANODE
GATE
ANODE
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.36
0.55
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
---
---
2.04
Q
H
Z
L
V
G
4
A
U
K
1 2 3
R
J
D
N
STYLE 3:
PIN 1.
2.
3.
4.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone:
303−675−2175 or 800−344−3860 Toll Free USA/Canada
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For additional information, please contact your local
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Embedded System
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