BLC9G20XS-160AV
Power LDMOS transistor
Rev. 3 — 24 May 2017
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS packaged asymmetric Doherty power transistor for base station
applications at frequencies from 1805 MHz to 1990 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in an asymmetrical Doherty demo test circuit. V
DS
= 30 V;
I
Dq
= 300 mA (main); V
GS(amp)peak
= 0.7 V, unless otherwise specified.
Test signal
1-carrier W-CDMA
[1]
f
(MHz)
1805 to 1880
V
DS
(V)
30
P
L(AV)
(W)
28
G
p
(dB)
16.6
D
(%)
47
ACPR
(dBc)
30
[1]
Test signal: 3GPP test model 1; 64 DPCH; PAR = 7.2 dB at 0.01% probability on CCDF per carrier.
1.2 Features and benefits
Excellent ruggedness
High-efficiency
Low thermal resistance providing excellent thermal stability
Designed for broadband operation (1805 MHz to 1990 MHz)
Asymmetric design to achieve optimum efficiency across the band
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent digital pre-distortion capability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for base stations and multi carrier applications in the 1805 MHz to
1990 MHz frequency range
BLC9G20XS-160AV
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
[1]
Pinning
Description
drain1 (main)
drain2 (peak)
gate1 (main)
gate2 (peak)
video decoupling (main)
video decoupling (peak)
source
[1]
Simplified outline
5
1
2
6
Graphic symbol
1, 5
3
7
4
7
3
4
2, 6
aaa-007731
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
BLC9G20XS-160AV
-
Description
air cavity plastic earless flanged package; 6 leads
Version
SOT1275-1
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS(amp)main
V
GS(amp)peak
T
stg
T
j
[1]
Parameter
drain-source voltage
main amplifier gate-source voltage
peak amplifier gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
5
5
65
[1]
Max
65
+13
+13
+150
225
Unit
V
V
V
C
C
-
Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF
calculator.
5. Thermal characteristics
Table 5.
R
th(j-c)
Thermal characteristics
Conditions
V
DS
= 30 V; I
Dq
= 300 mA (main);
V
GS(amp)peak
= 0.5 V; T
case
= 80
C
P
L
= 44.5 dBm
P
L
= 46.5 dBm
0.30
0.22
K/W
K/W
Typ
Unit
thermal resistance from junction
to case
Symbol Parameter
BLC9G20XS-160AV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 24 May 2017
2 of 14
BLC9G20XS-160AV
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C unless otherwise specified.
Symbol
Parameter
Conditions
Min Typ
65
1.5
-
-
-
-
-
-
2
-
Max
-
2.5
2.75
1.4
Unit
V
V
V
A
A
nA
S
m
Main device
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 0.6 mA
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
V
DS
= 10 V; I
D
= 60 mA
V
DS
= 30 V; I
D
= 300 mA
V
GS
= 0 V; V
DS
= 32 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 3.0 A
1.65 2.2
12.2 -
-
237
140
385
4.56 -
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 2.1 A
Peak device
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 1.1 mA
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
V
DS
= 10 V; I
D
= 110 mA
V
DS
= 30 V; I
D
= 660 mA
V
GS
= 0 V; V
DS
= 32 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 5.5 A
65
1.5
1.6
-
-
-
-
-
-
2
2.1
-
-
2.5
2.6
1.4
V
V
V
A
A
nA
S
m
21.7 -
-
129
140
214
8.16 -
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 3.85 A
Table 7.
RF characteristics
Test signal: 1-carrier W-CDMA; PAR = 7.2 dB at 0.01 % probability on the CCDF; 3GPP test
model 1; 1 to 64 DPCH; RF performance at V
DS
= 30 V; I
Dq
= 300 mA (main); V
GS(amp)peak
= 0.5 V;
T
case
= 25
C; unless otherwise specified; in an asymmetrical Doherty production test circuit at
frequencies from 1805 MHz to 1880 MHz.
Symbol
G
p
RL
in
D
ACPR
Parameter
power gain
input return loss
drain efficiency
adjacent channel power ratio
Conditions
P
L(AV)
= 28 W
P
L(AV)
= 28 W
P
L(AV)
= 28 W
P
L(AV)
= 28 W
Min
15.2
-
41.4
-
Typ
16.4
10
46
30
Max
-
5
-
23
Unit
dB
dB
%
dBc
Table 8.
RF characteristics
Test signal: pulsed CW; t
p
= 100
s;
= 10 %; RF performance at V
DS
= 30 V; I
Dq
= 300 mA (main);
V
GS(amp)peak
= 0.5 V; T
case
= 25
C; unless otherwise specified; in an asymmetrical Doherty
production test circuit at frequencies from 1805 MHz to 1880 MHz.
Symbol
P
L(M)
Parameter
peak output power
Conditions
Min
160
Typ
190
Max
-
Unit
W
BLC9G20XS-160AV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 24 May 2017
3 of 14
BLC9G20XS-160AV
Power LDMOS transistor
7. Test information
7.1 Ruggedness in Doherty operation
The BLC9G20XS-160AV is capable of withstanding a load mismatch corresponding to a
VSWR = 10 : 1 through all phases under the following conditions: V
DS
= 30 V;
I
Dq
= 300 mA (main); V
GS(amp)peak
= 0.5 V; P
L
= 135 W (CW); f = 1805 MHz.
7.2 Impedance information
Table 9.
Typical impedance of main device
Measured load-pull data of main device; I
Dq
= 360 mA (main); V
DS
= 30 V.
f
(MHz)
1805
1843
1880
1805
1843
1880
[1]
[2]
Z
S
[1]
()
2.20
j8.08
3.40
j8.84
3.67
j9.16
2.20
j8.08
3.40
j8.84
3.67
j9.16
Z
L
[1]
()
2.85
j5.54
2.85
j5.54
2.69
j5.13
5.06
j4.14
4.84
j2.59
5.00
j3.33
P
L
[2]
(W)
49.68
49.56
49.38
48.40
47.52
47.79
D
[2]
(%)
61.09
60.83
59.43
69.34
68.53
67.95
G
p
[2]
(dB)
16.57
16.55
16.48
18.42
18.61
18.99
Maximum power load
Maximum drain efficiency load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
Table 10. Typical impedance of peak device
Measured load-pull data of peak device; I
Dq
= 660 mA (peak); V
DS
= 30 V.
f
(MHz)
1805
1843
1880
1805
1843
1880
[1]
[2]
Z
S
[1]
()
1.76
j7.22
3.07
j7.53
3.44
j8.15
1.76
j7.22
3.07
j7.53
3.44
j8.15
Z
L
[1]
()
2.61
j6.60
2.61
j6.60
2.61
j6.60
4.65
j3.75
3.91
j3.12
3.94
j3.76
P
L
[2]
(W)
51.62
51.43
51.29
50.09
49.50
49.80
D
[2]
(%)
54.98
54.14
53.36
66.75
65.85
64.54
G
p
[2]
(dB)
15.72
15.60
15.75
18.39
18.49
18.55
Maximum power load
Maximum drain efficiency load
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
BLC9G20XS-160AV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 24 May 2017
4 of 14
BLC9G20XS-160AV
Power LDMOS transistor
drain
Z
L
gate
Z
S
001aaf059
Fig 1.
Definition of transistor impedance
7.3 Recommended impedances for Doherty design
Table 11. Typical impedance of main device at 1 : 1 load
Measured load-pull data of main device; I
Dq
= 300 mA (main); V
DS
= 30 V.
f
(MHz)
1805
1843
1880
[1]
[2]
[3]
Z
S
[1]
()
2.20
j8.08
3.40
j8.84
3.67
j9.16
Z
L
[1]
()
1.83
j4.0
1.80
j3.7
1.77
j3.4
P
L
[2]
(dBm)
49.09
49.15
49.09
D
[3]
(%)
55.81
56.21
55.86
G
p
[3]
(dB)
19.68
19.40
19.41
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
at P
L(AV)
= 44.5 dBm.
Table 12. Typical impedance of main device at 1 : 2.7 load
Measured load-pull data of main device; I
Dq
= 300 mA (main); V
DS
= 30 V.
f
(MHz)
1805
1843
1880
[1]
[2]
[3]
Z
S
[1]
()
2.20
j8.08
3.40
j8.84
3.67
j9.16
Z
L
[1]
()
4.30
j2.46
4.31
j2.29
4.31
j2.12
P
L
[2]
(dBm)
47.11
46.77
46.61
D
[3]
(%)
64.24
62.36
60.79
G
p
[3]
(dB)
22.15
22.36
22.70
Z
S
and Z
L
defined in
Figure 1.
at 3 dB gain compression.
at P
L(AV)
= 44.5 dBm.
BLC9G20XS-160AV
All information provided in this document is subject to legal disclaimers.
© Ampleon Netherlands B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 24 May 2017
5 of 14
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