ZL30703LDG6 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > semiconductor> Analog mixed-signal IC> ZL30703LDG6

ZL30703LDG6: DescriptionTRIPLE CHANNEL IEEE1588 SYNCHRON; Categorysemiconductor Analog mixed-signal IC; File Size169KB，6 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com; Environmental Compliance

Download Datasheet Compare View All

ZL30703LDG6 Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	ZL30703LDG6	-	-	View	Buy Now

ZL30703LDG6 Overview

TRIPLE CHANNEL IEEE1588 SYNCHRON

Preview

Download Datasheet

View All

Short Form Data Sheet

ZL30701/ZL30702/ZL30703/ZL30704

IEEE 1588 & Synchronous Ethernet Packet Clock Network Synchronizer

Features



Up to four independent clock channels

Fully compliant to EEC (G.8262), SEC (G.813), GR-253

SMC and GR-1244 Stratum 3/3E

Frequency accuracy performance for GSM, WCDMA-

FDD, LTE-FDD basestations and small cell applications,

with target performance less than ± 15 ppb.

Frequency performance for ITU-T G.823 and G.824

synchronization interface, as well as G.8261 PNT EEC,

PNT PEC and CES interface specifications.

Phase Synchronization performance for WCDMA-TDD,

TD-SCDMA, CDMA2000, LTE-TDD and LTE-A

applications with target performance less than ± 1 µs

phase alignment.

Client holdover and reference switching between

multiple Servers

Support for new ITU-T packet clock recommendations

or drafts: G.8263 PEC-S, G.8273.2 T-BC, T-TSC,

G.8273.4 T-BC-P, T-TSC-P & T-TSC-A

ZL30701LDG6*

ZL30702LDG6*

ZL30703LDG6*

ZL30704LDG6*

Ordering Information

100 Pin aQFN

Trays

100 Pin aQFN

Trays

100 Pin aQFN

Trays

100 Pin aQFN

Trays

*Pb Free Tin/Silver/Copper

Package size: 10 x 10 mm

-40



C to +85





Excellent jitter performance of 180 fs rms (12 kHz to 20 MHz)

meets 10G/40G and 100G PHY jitter requirements

Up to four programmable digital PLLs/NCOs with loop bandwidth

from 0.1 mHz to 470 Hz synchronize to any clock rate from 0.5 Hz

to 900 MHz

Automatic hitless reference switching and digital holdover on

reference fail with initial holdover accuracy better than 0.1 ppb

Any input reference can be fed with clock, sync (frame pulse),

clock /sync pair or clock modulated with sync pulse (embedded

PPS ePPS and embedded PP2S ePP2S)



OSCI

OSC0

PACKET_REF[0:3]

REFIN0_0P

REFIN1_0N

REFIN2_1P

REFIN3_1N

REFIN4_2P

REFIN5_2N

REFIN6_3P

REFIN7_3N

REFIN8_4P

REFIN9_4N

Master Clock

Osc

ZL30701/ZL30702/ZL30703/ZL30704

Clock Generator 0

GP Synthesizer 0

Fs= Bs

*Ks

*Ms

/Ns

Div B

Div A

LVCMOS

GPOUT0

One Diff / Two

Single Ended

One Diff / Two

Single Ended

One Diff / Two

Single Ended

One Diff / Two

Single Ended

One Diff / Two

Single Ended

DPLL0

Select Loop band.,

Phase slope limit

LVCMOS

GPOUT1

DPLL1

Select Loop band.,

Phase slope limit

Clock Generator 1

HP Synthesizer 1

Fs= Bs

*Ks

*Ms

/Ns

Div A

Div B

Div C

Div D

DPLL2

Select Loop band.,

Phase slope limit

Clock Generator 2

DPLL3

Select Loop band.,

Phase slope limit

HP Synthesizer 2

Fs= Bs

*Ks

*Ms

/Ns

CML

2 x LVCMOS

CML

2 x LVCMOS

CML

LVCMOS

CML

LVCMOS

CML

LVCMOS

CML

LVCMOS

HPOUT0_0P

HPOUT1_0N

HPOUT2_1P

HPOUT3_1N

Div A

Div B

Div C

Div D

HPOUT4_2P

HPOUT5_2N

HPOUT6_3P

HPOUT7_3N

Part Number Available DPLLs

ZL30701

ZL30702

ZL30703

ZL30704

DPLL[0]

DPLL[0,1]

DPLL[0,1,2]

DPLL[0,1,2,3]

Configuration

and Status

State Machine

Osc

Clock Generator 3

HP Synthesizer 3

Fs= Bs

*Ks

*Ms

/Ns

Sys APLL

Div A

HPOUT8_4P

HPOUT9_4N

HPOUT10_5P

HPOUT11_5N

Reference Monitors

JTAG

SysClk

Osc

MCLKIN_P

MCLKIN_N

Div B

SPI / I

JTAG

PWR_b

GPIO

Functional Block Diagram

August 2016

ZL30701/ZL30702/ZL30703/ZL30704

Confidential

ZL30703LDG6 Related Products

	ZL30703LDG6	ZL30701LDG6	ZL30704LDG6	ZL30702LDG6
Description	TRIPLE CHANNEL IEEE1588 SYNCHRON	SINGLE CHANNEL IEEE1588 SYNCHRON	QUAD CHANNEL IEEE1588 SYNCHRONIZ	DUAL CHANNEL IEEE1588 SYNCHRONIZ

Recommended Resources

Delay light circuit using digital circuit (3)

Intermediate frequency amplifier circuit using MC1355

Circuit diagram starting from 0V

Two DAC1231 and microcontroller interface circuits

Rotary encoder circuit

Half-bridge 500W switching regulated power supply circuit made with CWl525A

Debate - Is Maradona a good coach?: During the World Cup qualifiers, Maradona took over midway and led Argentina to a thrilling World Cup qualification. Many people say that Maradona is not suitable to be a coach.In this World Cup, Arge...; tiankai001 Talking

Problems with image transmission using twisted pair cables: Problems with using twisted pair cables to transmit images. Images were originally transmitted unbalanced using video cables because they require broadband transmission. Unbalanced transmission has lo...; jek9528 Industrial Control Electronics

Huawei ranks third in global smartphone shipments, while ZTE and Lenovo rank in the top ten: [i=s]This post was last edited by jameswangsynnex on 2015-3-3 19:59[/i] [p=25, null, left][color=rgb(51, 51, 51)][b]Q3 global smartphone shipment TOP10, Huawei ranked third, ZTE and Lenovo entered the...; wstt Mobile and portable

Beginner's guide to FPGA: Modify configured pins in FPGA: Record the small mistakes I encountered when I first learned FPGA: 1 You can use quartus to open the qsf file and modify it. Do not write anything in the unused area. Save and close it and compile it....; zl_felix FPGA/CPLD

Usage of GetWindowsDirectory() function under EVC: Why do I get the following two errors when calling the GetWindowsDirectory() function under EVC: G:\VCproject\Test00\Test00Dlg.cpp(67) : error C2039: 'GetCurrentDirectory' : is not a member of '`globa...; bingxue668 Embedded System

Chip information (pretty good): Chip information (pretty good)...; wangwei20060608 MCU

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components