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Datasheet> All Categories > Other integrated circuit (IC)> Consumption circuit> BD37069FV-ME2
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BD37069FV-ME2

Description
BD37069FV-M IS A SOUND PROCESSOR
CategoryOther integrated circuit (IC)    Consumption circuit   
File Size3MB，40 Pages
ManufacturerROHM Semiconductor
Websitehttps://www.rohm.com/
Environmental Compliance
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BD37069FV-ME2 Overview

BD37069FV-M IS A SOUND PROCESSOR

BD37069FV-ME2 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerROHM Semiconductor
package instructionSSOP,
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time12 weeks
Other featuresSEATED HT-CALCULATED
Commercial integrated circuit typesCONSUMER CIRCUIT
JESD-30 codeR-PDSO-G40
length13.6 mm
Number of functions1
Number of terminals40
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Filter levelAEC-Q100
Maximum seat height2 mm
Maximum supply voltage (Vsup)17.8 V
Minimum supply voltage (Vsup)7 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width5.4 mm
Base Number Matches1

BD37069FV-ME2 Preview

Datasheet
Sound Processor for Car Audio
with Built-in High-Voltage Amplifier and
nd
2 Order Post Filter
BD37069FV-M
General Description
BD37069FV-M is a sound processor developed for car
audio with built-in selector of six stereo inputs and output
interfaced to ADC after adjusting signal level.
BD37069FV-M has a 6-channel volume circuit and
nd
built-in 2 order post filter which reduces the out-of
-band noise. The High-Voltage function is capable to
reach up to 5.2V
RMS
maximum output. Furthermore, the
IC is simple to design due to the built-in TDMA noise
reduction systems.
Key Specifications
(Note2)
Total Harmonic Distortion:
Maximum Input Voltage:
Common Mode Rejection Ratio :
Maximum Output Voltage:
Output Noise Voltage:
Residual Output Noise Voltage:
Ripple Rejection Ratio:
Operating Temperature Range:
0.003%(Typ)
2.1V
RMS
(Typ)
55dB(Min)
5.2V
RMS
(Typ)
23μV
RMS
(Typ)
10.5μV
RMS
(Typ)
-70dB (Typ)
-40°C to +85°C
(Note2)These specifications are High-Voltage mode2.
Features
AEC-Q100 Qualified
Built-in differential input selector that can select
single-ended / differential input
Reduce switching pop noise of input gain control due
to the built-in advanced switch circuit
nd
Less out-of-band noise of DAC by built-in 2 order
post filter
Built-in buffered ground isolation amplifier to achieve
high CMRR characteristics
Built-in TDMA noise reduction circuit reduces the
additional components for external filter
Available to output 5.2V
RMS
by High-Voltage function
(This device is possible to 3.2V
RMS
output by using
another High-Voltage mode, VCCH=11.5V)
2
Available to control by 3.3V / 5V for I C-bus
controller
The input and output terminals are located together to
arrange the flow of signal in a same direction making
the PCB layout easier and PCB area smaller
(Note 1) Grade 3
(Note1)
Package
SSOP-B40
W(Typ) x D(Typ) x H(Max)
13.60mm x 7.80mm x 2.00mm
Applications
Car Audio and Other Audio Equipment
Typical Application Circuit
ADC
DSP
DAC
INS INC
IG1 IG2 INF2 INF1 INR2 INR1
A1
CD
USB
BD37069FV-M
Main Gain adjust Sub Gain adjust
A2
B1
B2
Input selector (2 single-ended and 4 stereo ISO)
Fader
boost★
Fader
boost★
2nd order
LPF
2nd order
LPF
Fader
ATT★
Fader
ATT★
Sub SEL
Level
Shift
Level
Shift
Level
Shift
Level
Shift
★
OUTC
TUN
CN
CP2
DP1
GND
GND
ISO amp ISO amp
CP1
OUTS
AUX
DN
DP2
EP1
★
Input Gain
AUX
EN
EP2
FP1
FN1
GND
GND
ISO amp ISO amp
Fader
boost★
Fader
boost★
Front SEL
Fader
boost★
2nd order
LPF
2nd order
LPF
2nd order
LPF
★
Fader
ATT★
Fader
ATT★
Fader
ATT★
Advanced Switch
OUTR2
Level
Shift
Level
Shift
OUTF1
BT
★
FN2
FP2
OUTF2
MIN
Figure 1. Typical Application Circuit
NAVI
○Product
structure：Silicon monolithic integrated circuit
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This
product has no designed protection against radioactive rays
1/37
TSZ02201-0C2C0E100270-1-2
12. MAY. 2016 Rev.001
Power
Rear SEL
Fader
boost★
2nd order
LPF
Fader
ATT★
OUTR1
AMP
BD37069FV-M
Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
(Note2)
Key Specifications
.................................................................................................................................................................. 1
Package .......................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................... 1
Typical Application Circuit ............................................................................................................................................................... 1
Contents ......................................................................................................................................................................................... 2
Pin Configuration ............................................................................................................................................................................ 3
Pin Descriptions .............................................................................................................................................................................. 3
Block Diagram ................................................................................................................................................................................ 4
Absolute Maximum Ratings (Ta=25°C) ........................................................................................................................................... 5
(Note 1)
Thermal Resistance
............................................................................................................................................................... 5
Recommended Operating Condition ............................................................................................................................................... 5
Electrical Characteristics................................................................................................................................................................. 6
Typical Performance Curve(s) ........................................................................................................................................................ 9
2
I C-bus CONTROL SIGNAL SPECIFICATION ............................................................................................................................. 11
(1)
Electrical specifications and timing for bus lines and I/O stages ..................................................................................... 11
2
(2)
I C-bus FORMAT ............................................................................................................................................................. 12
2
(3)
I C-bus Interface Protocol................................................................................................................................................ 12
(4)
Slave address .................................................................................................................................................................. 12
(5)
Select Address & Data..................................................................................................................................................... 13
(6)
About power on reset ...................................................................................................................................................... 21
(7)
About start-up and power off sequence on IC ................................................................................................................. 21
(8)
About relations of power supply voltage and the DC-bias voltage ................................................................................... 22
About advanced switch circuit....................................................................................................................................................... 23
Application Example ..................................................................................................................................................................... 28
I/O Equivalence Circuit ................................................................................................................................................................. 29
Application Information ................................................................................................................................................................. 31
1)
Absolute maximum rating voltage................................................................................................................................... 31
2)
About a signal input part ................................................................................................................................................. 31
3)
About output load characteristics.................................................................................................................................... 31
4)
About HIVOLB terminal(20pin) when power supply is off ............................................................................................... 32
5)
About signal input terminals ........................................................................................................................................... 32
6)
About changing gain of Input Gain and Fader Volume ................................................................................................... 32
7)
About inter-pin short to VCCH ........................................................................................................................................ 32
Operational Notes ......................................................................................................................................................................... 33
1.
Reverse Connection of Power Supply ............................................................................................................................ 33
2.
Power Supply Lines ........................................................................................................................................................ 33
3.
Ground Voltage............................................................................................................................................................... 33
4.
Ground Wiring Pattern .................................................................................................................................................... 33
5.
Thermal Consideration ................................................................................................................................................... 33
6.
Recommended Operating Conditions............................................................................................................................. 33
7.
Inrush Current................................................................................................................................................................. 33
8.
Operation Under Strong Electromagnetic Field .............................................................................................................. 33
9.
Testing on Application Boards ........................................................................................................................................ 33
10.
Inter-pin Short and Mounting Errors ............................................................................................................................... 34
11.
Unused Input Pins .......................................................................................................................................................... 34
12.
Regarding the Input Pin of the IC ................................................................................................................................... 34
Ordering Information ..................................................................................................................................................................... 35
Marking Diagram .......................................................................................................................................................................... 35
Physical Dimension, Tape and Reel Information ........................................................................................................................... 36
Revision History ............................................................................................................................................................................ 37
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
2/37
TSZ02201-0C2C0E100270-1-2
12. MAY. 2016 Rev.001
BD37069FV-M
Pin Configuration
SSOP-B40
(TOP VIEW)
A1
A2
B1
B2
CP1
CN
CP2
DP1
DN
DP2
EP1
EN
EP2
FP1
FN1
FN2
FP2
MIN
HIVOLB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
20
40 OUTC
39 OUTS
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
OUTR1
OUTR2
OUTF1
OUTF2
INF2
INF1
INR2
INR1
INS
INC
IG1
IG2
VCCL
VREF
GND
SDA
SCL
VCCH
SEL 19
Figure 2.Pin Configuration
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Name
A1
A2
B1
B2
CP1
CN
CP2
DP1
DN
DP2
EP1
EN
EP2
FP1
FN1
FN2
FP2
MIN
SEL
HIVOLB
Description
A input terminal of 1ch
A input terminal of 2ch
B input terminal of 1ch
B input terminal of 2ch
C positive input terminal of 1ch
C negative input terminal
C positive input terminal of 2ch
D positive input terminal of 1ch
D negative input terminal
D positive input terminal of 2ch
E positive input terminal of 1ch
E negative input terminal
E positive input terminal of 2ch
F positive input terminal of 1ch
F negative input terminal of 1ch
F negative input terminal of 2ch
F positive input terminal of 2ch
Mixing input terminal
High Voltage output mode Select
Output Gain control terminal
Pin No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin Name
VCCH
SCL
SDA
GND
VREF
VCCL
IG2
IG1
INC
INS
INR1
INR2
INF1
INF2
OUTF2
OUTF1
OUTR2
OUTR1
OUTS
OUTC
Description
VCCH terminal for power supply
I C-bus clock terminal
I C-bus data terminal
GND terminal
BIAS terminal
VCCL terminal for power supply
Input gain output terminal of 2ch
Input gain output terminal of 1ch
Center input terminal
Subwoofer input terminal
Rear input terminal of 1ch
Rear input terminal of 2ch
Front input terminal of 1ch
Front input terminal of 2ch
Front output terminal of 2ch
Front output terminal of 1ch
Rear output terminal of 2ch
Rear output terminal of 1ch
Subwoofer output terminal
Center output terminal
2
2
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
3/37
TSZ02201-0C2C0E100270-1-2
12. MAY. 2016 Rev.001
BD37069FV-M
Block Diagram
OUTC
40
OUTS OUTR1 OUTR2 OUTF1 OUTF2 INF2
39
38
37
36
35
34
INF1
33
INR2
32
INR1
31
INS
30
INC
29
IG1
28
IG2
27
VCCL
26
VREF
25
GND
24
SDA
23
SCL
22
VCCH
21
Level
Shift
Level
Shift
Level
Shift
Level
Shift
Level
Shift
Level
Shift
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
100kΩ
REG(4.15V)
I
2
C-bus LOGIC
Sub SEL
★
★
■Fader
: +23dB½-79dB、-∞/1dBstep
Main Gain adjust
Sub
Gain adjust
■Input
Gain : +23dB½-15dB/1dBstep
■Front
Mixing : on/off
・The
outputs of Pin 27 and Pin 28 are selected by the input selector, from the inputs Pin 1 to Pin 17.
Otherwise, these signals are possible to output directly on Pin 35 to Pin 40.
nd
・6-channel
input signals from DSP on Pin 29 to Pin 34 pass through the volume circuit (Fader) and 2 order post filter to the
output terminals Pin 35 to Pin 40 .
・It
is possible for 6-channel inputs to set the gain up to +6dB by Gain adjust function and to set the gain up to +8.3dB by Level
Shift Circuit (High-Voltage Mode).
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Fader
ATT★
ATT★
Fader
boost★
boost★
1
100kΩ
Fader
ATT★
Fader
boost★
Rear SEL
100kΩ
2
2nd order LPF
Fader
boost★
boost★
250kΩ
3
Fader
ATT★
Fader
ATT★
Fader
boost★
Front
SEL
4
250kΩ
Fader
ATT★
Fader
boost★
★
5
GND
ISO amp
250kΩ
Fader
ATT★
Fader
boost★
Input Gain
GND
ISO amp
250kΩ
6
7
★
Advanced Switch
■2nd order LPF: fc=70kHz
■Main/Sub Gain Adjust 0dB/6dB
■Anti-GSM circuit
■High Voltage Output
Level Shift = 2dB(normal mode)
Level Shift = 4.6dB(Hi-voltage mode1)
Level Shift = 8.3dB(Hi-voltage mode2)
Input selector (2 single-ended and 4 stereo ISO)
GND
ISO amp
250kΩ
GND
ISO amp
250kΩ
250kΩ
GND
ISO amp
250kΩ
GND
ISO amp
250kΩ
250kΩ
GND
ISO amp
250kΩ
250kΩ
GND
ISO amp
250kΩ
250kΩ
100kΩ
250kΩ
8
9
10
11
12
13
14
15
16
17
18
19
20
A1
A2
B1
B2
CP1
CN
CP2
DP1
DN
DP2
EP1
EN
EP2
FP1
FN1
FN2
FP2
MIN
SEL
HIVOLB
Figure 3. Block Diagram
4/37
TSZ02201-0C2C0E100270-1-2
12. MAY. 2016 Rev.001
BD37069FV-M
Absolute Maximum Ratings (Ta=25°C)
Parameter
Power Supply Voltage
Input Voltage
Storage Temperature
Maximum Junction Temperature
Symbol
V
CCL
V
CCH
V
IN
T
STG
T
JMAX
SCL, SDA
Other
Rating
10
18
GND-0.3 to +7
GND-0.3 to V
CCL
+0.3
-55 to +150
+150
Unit
V
V
V
°C
°C
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Thermal Resistance
(Note 1)
Parameter
SSOP-B40
Junction to Ambient
Junction to Top Characterization Parameter
(Note 2)
Symbol
Thermal Resistance (Typ)
1s
(Note 3)
2s2p
(Note
4)
Unit
θ
JA
Ψ
JT
103.6
17
58.8
10
°C/W
°C/W
(Note 1)Based
on JESD51-2A(Still-Air)
(Note 2)The
thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3)Using
a PCB board based on JESD51-3.
(Note 4)Using
a PCB board based on JESD51-7
Layer Number of
Measurement Board
Single
Top
Copper Pattern
Footprints and Traces
.
Material
FR-4
Thickness
70μm
Board Size
114.3mm x 76.2mm x 1.6mmt
Layer Number of
Measurement Board
4 Layers
Top
Copper Pattern
Footprints and Traces
Material
FR-4
Thickness
70μm
Board Size
114.3mm x 76.2mm x 1.6mmt
2 Internal Layers
Copper Pattern
74.2mm x 74.2mm
Thickness
35μm
Bottom
Copper Pattern
74.2mm x 74.2mm
Thickness
70μm
Recommended Operating Condition (Ta= -40°C to +85°C)
Parameter
Power Supply Voltage
Symbol
V
CCL
V
CCH
Min
7.0
V
CCL
Typ
9
17
Max
9.5
17.8
Unit
V
V
www.rohm.com
© 2016 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/37
TSZ02201-0C2C0E100270-1-2
12. MAY. 2016 Rev.001
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