EEWORLDEEWORLDEEWORLD

Part Number

Search

552AF000064DGR

Description
VCXO; DIFF/SE; DUAL FREQ; 10-141
CategoryPassive components   
File Size477KB,15 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric View All

552AF000064DGR Online Shopping

Suppliers Part Number Price MOQ In stock  
552AF000064DGR - - View Buy Now

552AF000064DGR Overview

VCXO; DIFF/SE; DUAL FREQ; 10-141

552AF000064DGR Parametric

Parameter NameAttribute value
typeVCXO
Frequency - Output 1153.6MHz
Frequency - Output 2125MHz
Frequency - Output 3-
Frequency - Output 4-
Functionenable/disable
outputLVPECL
Voltage - Power3.3V
frequency stability±50ppm
Operating temperature-40°C ~ 85°C
Current - Power (maximum)130mA
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
high0.071"(1.80mm)
Package/casing6-SMD, no leads
Current - Power (disabled) (maximum)75mA
Si 5 5 2
R
EVISION
D
D
U A L
F
REQUENCY
V
OLTAGE
- C
ON TROLLED
C
R Y S TA L
O
SCILLATOR
(VCXO) 10 MH
Z TO
1 . 4 G H
Z
Features
Available with any-rate output
frequencies from 10–945 MHz and
selected frequencies to 1.4 GHz
Two selectable output frequencies
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Applications
SONET/SDH
xDSL
10 GbE LAN/WAN
Ordering Information:
Low-jitter clock generation
Optical modules
Clock and data recovery
See page 10.
Description
The Si552 dual-frequency VCXO utilizes Silicon Laboratories’ advanced
DSPLL
®
circuitry to provide a very low jitter clock for all output frequencies.
The Si552 is available with any-rate output frequency from 10 to 945 MHz
and selected frequencies to 1400 MHz. Unlike traditional VCXOs, where a
different crystal is required for each output frequency, the Si552 uses one
fixed crystal frequency to provide a wide range of output frequencies. This
IC-based approach allows the crystal resonator to provide exceptional
frequency stability and reliability. In addition, DSPLL clock synthesis
provides superior supply noise rejection, simplifying the task of generating
low-jitter clocks in noisy environments typically found in communication
systems. The Si552 IC-based VCXO is factory-configurable for a wide
variety of user specifications including frequency, supply voltage, output
format, tuning slope, and temperature stability. Specific configurations are
factory programmed at time of shipment, thereby eliminating the long lead
times associated with custom oscillators.
Pin Assignments:
See page 9.
(Top View)
V
C
1
2
3
6
5
4
V
DD
FS
GND
CLK–
CLK+
Functional Block Diagram
V
DD
CLK- CLK+
Fixed
Frequency XO
Any-rate
10–1400 MHz
DSPLL
®
Clock Synthesis
ADC
V
C
FS
GND
Rev. 1.2 6/18
Copyright © 2018 by Silicon Laboratories
Si552
Please tell me the speed of AM335X SK (WL1271) soft AP WIFI
Excuse me... I did the following test and the PC sent data. AM335X SK will respond after receiving the data. The PC calculates the time from sending the data to reading the data. There is a certain de...
justin0710 DSP and ARM Processors
After the compilation is successful, an error message appears when downloading to the target machine. What is the error?
I would like to ask what causes the following error? The project compiles successfully, but an error message appears when downloading. Errors while downloading D:/downLoadable/PENTIUMgnu/breakPoint.ou...
zxhnet Embedded System
EEWORLD has launched a Sina Weibo account!
EEWORLD Sina Weibo has found a good day to start a blog!http://t.sina.com.cn/1656829822/profileLooking forward to your attention! :)...
EEWORLD社区 Talking
After the Altium Designer schematic is imported into the PCB, the original component silk screen suffix is lost
The main schematic references the sub-schematic multiple times. The sub-schematics are distinguished by A, B, and C. When the schematic is compiled, the sub-schematic page components automatically gen...
ucan PCB Design
FM25H20 reading and writing problems
I use dsPIC33FJ128GP306 to control the reading and writing of FM25H20 chip, and the two are connected through SPI interface. In the program, I first write a data to RAM, and then read the data from th...
翔亘 Microchip MCU
Arteli AT32 uses GPIO to simulate HDMI CEC case
PrefaceThis application note mainly describes a case of implementing a simple HDMI CEC transceiver function based on AT32 GPIO and timer peripherals.Consumer electronic control (CEC) isa function of t...
火辣西米秀 Domestic Chip Exchange

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 771  2873  341  319  2248  16  58  7  46  29 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号