PIC32MX570F512LT-I/PT datasheet, PDF

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PIC32MX570F512LT-I/PT: DescriptionIC MCU 32BIT 512KB FLASH 100TQFP; Categorysemiconductor The embedded processor and controller; File Size5MB，382 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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PIC32MX570F512LT-I/PT Overview

IC MCU 32BIT 512KB FLASH 100TQFP

PIC32MX570F512LT-I/PT Parametric

Parameter Name	Attribute value
core processor	MIPS32® M4K™
core size	32-bit
speed	40MHz
Connectivity	CANbus，I²C，IrDA，LINbus，PMP，SPI，UART/USART，USB OTG
Peripheral	Undervoltage detection/reset, DMA, I²S, POR, PWM, WDT
Number of I/Os	81
Program storage capacity	512KB（512K x 8）
Program memory type	flash memory
EEPROM capacity	-
RAM capacity	64K x 8
Voltage - Power Supply (Vcc/Vdd)	2.3 V ~ 3.6 V
data converter	A/D 48x10b
Oscillator type	internal
Operating temperature	-40°C ~ 85°C（TA）
Package/casing	100-TQFP
Supplier device packaging	100-TQFP（12x12）

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PIC32MX1XX/2XX/5XX 64/100-PIN

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with

Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Operating Conditions

• 2.3V to 3.6V, -40ºC to +105ºC (DC to 40 MHz),

-40ºC to +85ºC (DC to 50 MHz)

Timers/Output Compare/Input Capture

• Five General Purpose Timers:

- Five 16-bit and up to two 32-bit Timers/Counters

• Five Output Compare (OC) modules

• Five Input Capture (IC) modules

• Peripheral Pin Select (PPS) to allow function remap

• Real-Time Clock and Calendar (RTCC) module

Core: 50 MHz/83 DMIPS MIPS32 M4K

• MIPS16e

mode for up to 40% smaller code size

• Code-efficient (C and Assembly) architecture

• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply

Clock Management

•

0.9% internal oscillator

Programmable PLLs and oscillator clock sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer

Fast wake-up and start-up

Communication Interfaces

• USB 2.0-compliant Full-speed OTG controller

• Up to five UART modules (12.5 Mbps):

- LIN 1.2 protocols and IrDA

support

• Four 4-wire SPI modules (25 Mbps)

• Two I

C modules (up to 1 Mbaud) with SMBus support

• PPS to allow function remap

• Parallel Master Port (PMP) with dual read/write buffers

• Controller Area Network (CAN) 2.0B Compliant with

DeviceNet™ addressing support

Power Management

• Low-power management modes (Sleep and Idle)

• Integrated Power-on Reset, Brown-out Reset, and High

Voltage Detect

• 0.5 mA/MHz dynamic current (typical)

• 44

μA

current (typical)

Direct Memory Access (DMA)

• Four channels of hardware DMA with automatic data

size detection

• 32-bit Programmable Cyclic Redundancy Check (CRC)

• Two additional channels dedicated to USB

• Two additional channels dedicated to CAN

Audio/Graphics/Touch HMI Features

External graphics interface with up to 34 PMP pins

Audio data communication: I

S, LJ, RJ, USB

Audio data control interface: SPI and I

Audio data master clock:

- Generation of fractional clock frequencies

- Can be synchronized with USB clock

- Can be tuned in run-time

• Charge Time Measurement Unit (CTMU):

- Supports mTouch

capacitive touch sensing

- Provides high-resolution time measurement (1 ns)

•

Input/Output

• 10 mA or 15 mA source/sink for standard V

and

up to 22 mA for non-standard V

OH1

• 5V-tolerant pins

• Selectable open drain, pull-ups, and pull-downs

• External interrupts on all I/O pins

Qualification and Class B Support

• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC)

• Class B Safety Library, IEC 60730

Advanced Analog Features

• ADC Module:

- 10-bit 1 Msps rate with one Sample and Hold (S&H)

- Up to 48 analog inputs

- Can operate during Sleep mode

• Flexible and independent ADC trigger sources

• On-chip temperature measurement capability

• Comparators:

- Three dual-input Comparator modules

- Programmable reference with 32 voltage points

Debugger Development Support

•

In-circuit and in-application programming

4-wire MIPS

Enhanced JTAG interface

Unlimited program and six complex data breakpoints

IEEE 1149.2-compatible (JTAG) boundary scan

Packages

Type

Pin Count

I/O Pins (up to)

Contact/Lead Pitch

Dimensions

Note

QFN

0.50 mm

9x9x0.9 mm

0.50 mm

10x10x1 mm

TQFP

100

0.40 mm

12x12x1 mm

100

0.50 mm

14x14x1 mm

TFBGA (see Note 1)

100

0.65 mm

7x7x1.2 mm

Please contact your local Microchip Sales Office for information regarding the availability of devices in the 100-pin TFBGA package.



2014-2017 Microchip Technology Inc.

DS60001290E-page 1

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