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NLU1G86CMUTCG

Description
IC GATE XOR 1CH 2-INP 6UDFN
Categorylogic    logic   
File Size132KB,7 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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NLU1G86CMUTCG Overview

IC GATE XOR 1CH 2-INP 6UDFN

NLU1G86CMUTCG Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
Parts packaging codeDFN
package instruction1 X 1 MM, 0.35 MM PITCH, LEAD FREE, UDFN-6
Contacts6
Manufacturer packaging code517BX
Reach Compliance Codecompliant
Factory Lead Time13 weeks
series1G
JESD-30 codeS-PDSO-N6
length1 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeXOR GATE
MaximumI(ol)0.004 A
Humidity sensitivity level1
Number of functions1
Number of entries2
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Encapsulate equivalent codeSOLCC6,.04,14
Package shapeSQUARE
Package formSMALL OUTLINE, VERY THIN PROFILE
method of packingTAPE AND REEL
power supply1.8/5 V
Prop。Delay @ Nom-Sup19.5 ns
propagation delay (tpd)19.5 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height0.55 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceNickel/Gold/Palladium (Ni/Au/Pd)
Terminal formNO LEAD
Terminal pitch0.35 mm
Terminal locationDUAL
width1 mm
NLU1G86
Single 2-Input Exclusive OR
Gate
The NLU1G86 MiniGatet is an advanced high−speed CMOS
2−input Exclusive OR gate in ultra−small footprint.
The NLU1G86 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
Features
www.onsemi.com
MARKING
DIAGRAMS
UDFN6
1.0 x 1.0
CASE 517BX
1
UDFN6
1.2 x 1.0
CASE 517AA
1
IN B
1
6
V
CC
1
IN A
2
5
NC
4
M
= Device Marking
= Date Code
UDFN6
1.45 x 1.0
CASE 517AQ
XM
XM
High Speed: t
PD
= 3.5 ns (Typ) @ V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
XM
GND
3
4
OUT Y
ORDERING INFORMATION
Figure 1. Pinout
(Top View)
IN A
IN B
=1
OUT Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
2
3
4
5
6
IN B
IN A
GND
OUT Y
NC
V
CC
FUNCTION TABLE
Input
A
L
L
H
H
B
L
H
L
H
Output
Y
L
H
H
L
©
Semiconductor Components Industries, LLC, 2016
August, 2016
Rev. 3
1
Publication Order Number:
NLU1G86/D

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Description IC GATE XOR 1CH 2-INP 6UDFN Single 2-Input Exclusive OR Gate IC GATE XOR 1CH 2-INP 6UDFN

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