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74LVC00AD-Q100J

Description
IC GATE NAND 4CH 2-INP 14SO
Categorylogic    logic   
File Size725KB,14 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74LVC00AD-Q100J Overview

IC GATE NAND 4CH 2-INP 14SO

74LVC00AD-Q100J Parametric

Parameter NameAttribute value
Brand NameNexperia
Is it Rohs certified?conform to
MakerNexperia
Parts packaging codeSOIC
package instructionSOP-14
Contacts14
Manufacturer packaging codeSOT108-1
Reach Compliance Codecompliant
Samacsys Description74LVC00A-Q100 - Quad 2-input NAND gate@en-us
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G14
length8.65 mm
Logic integrated circuit typeNAND GATE
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)9.7 ns
Filter levelAEC-Q100
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
Base Number Matches1
74LVC00A-Q100
Quad 2-input NAND gate
Rev. 1 — 27 February 2013
Product data sheet
1. General description
The 74LVC00A-Q100 provides four 2-input NAND gates.
Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall
times.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V applications.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options

74LVC00AD-Q100J Related Products

74LVC00AD-Q100J 74LVC00APW-Q100J 74LVC00ABQ-Q100X
Description IC GATE NAND 4CH 2-INP 14SO IC GATE NAND 4CH 2-INP 14TSSOP IC GATE NAND 4CH 2-INP 14DQFN
Brand Name Nexperia Nexperia Nexperia
Maker Nexperia Nexperia Nexperia
Parts packaging code SOIC TSSOP QFN
package instruction SOP-14 TSSOP, HVQCCN,
Contacts 14 14 14
Manufacturer packaging code SOT108-1 SOT402-1 SOT762-1
Reach Compliance Code compliant compliant compliant
Samacsys Description 74LVC00A-Q100 - Quad 2-input NAND gate@en-us 74LVC00A-Q100 - Quad 2-input NAND gate@en-us 74LVC00A-Q100 - Quad 2-input NAND gate@en-us
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PQCC-N14
length 8.65 mm 5 mm 3 mm
Logic integrated circuit type NAND GATE NAND GATE NAND GATE
Number of functions 4 4 4
Number of entries 2 2 2
Number of terminals 14 14 14
Maximum operating temperature 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP TSSOP HVQCCN
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
propagation delay (tpd) 9.7 ns 9.7 ns 9.7 ns
Filter level AEC-Q100 AEC-Q100 AEC-Q100
Maximum seat height 1.75 mm 1.1 mm 1 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.2 V 1.2 V 1.2 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V 1.8 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal form GULL WING GULL WING NO LEAD
Terminal pitch 1.27 mm 0.65 mm 0.5 mm
Terminal location DUAL DUAL QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 3.9 mm 4.4 mm 2.5 mm
Base Number Matches 1 1 1
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