SN74ACT74PWE4 datasheet, PDF - EEWORLD Datasheet

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SN74ACT74PWE4: DescriptionFlip Flops Dual Pos-Edge-Trig D-Type Flip-Flop; Categorylogic logic; File Size507KB，16 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74ACT74PWE4 Overview

Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop

SN74ACT74PWE4 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP14,.25
Contacts	14
Reach Compliance Code	unknow
series	ACT
JESD-30 code	R-PDSO-G14
JESD-609 code	e4
length	5 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	D FLIP-FLOP
Maximum Frequency@Nom-Su	125000000 Hz
MaximumI(ol)	0.024 A
Humidity sensitivity level	1
Number of digits	1
Number of functions	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP14,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	5 V
propagation delay (tpd)	13 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	4.4 mm
minfmax	125 MHz

SN74ACT74PWE4 Related Products

	SN74ACT74PWE4	SN74ACT74NSRE4	SN74ACT74DBRE4
Description	Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop	Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop	Flip Flops Dual Pos-Edge-Trig D-Type Flip-Flop
Is it lead-free?	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to
Parts packaging code	TSSOP	SOIC	SSOP
package instruction	TSSOP, TSSOP14,.25	SOP, SOP14,.3	SSOP, SSOP14,.3
Contacts	14	14	14
Reach Compliance Code	unknow	unknow	unknow
series	ACT	ACT	ACT
JESD-30 code	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
JESD-609 code	e4	e4	e4
length	5 mm	10.2 mm	6.2 mm
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Maximum Frequency@Nom-Su	125000000 Hz	125000000 Hz	125000000 Hz
MaximumI(ol)	0.024 A	0.024 A	0.024 A
Humidity sensitivity level	1	1	1
Number of digits	1	1	1
Number of functions	2	2	2
Number of terminals	14	14	14
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SOP	SSOP
Encapsulate equivalent code	TSSOP14,.25	SOP14,.3	SSOP14,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260
power supply	5 V	5 V	5 V
propagation delay (tpd)	13 ns	13 ns	13 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	2 mm	2 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	1.27 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	4.4 mm	5.3 mm	5.3 mm
minfmax	125 MHz	125 MHz	125 MHz
Maker	Texas Instruments	-	Texas Instruments
method of packing	-	TAPE AND REEL	TAPE AND REEL

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