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74LVC132AD,118

Description
IC GATE NAND SCHMITT 4CH 14SO
Categorylogic    logic   
File Size752KB,16 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74LVC132AD,118 Overview

IC GATE NAND SCHMITT 4CH 14SO

74LVC132AD,118 Parametric

Parameter NameAttribute value
Brand NameNexperia
Is it Rohs certified?conform to
MakerNexperia
Parts packaging codeSOIC
package instruction3.90 MM, PLASTIC, MS-012, SOT-108-1, SOP-14
Contacts14
Manufacturer packaging codeSOT108-1
Reach Compliance Codecompliant
Samacsys Description74LVC132A - Quad 2-input NAND Schmitt trigger@en-us
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G14
JESD-609 codee4
length8.65 mm
Logic integrated circuit typeNAND GATE
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)16 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
Base Number Matches1
74LVC132A
Quad 2-input NAND Schmitt trigger
Rev. 3 — 7 December 2011
Product data sheet
1. General description
The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is
capable of transforming slowly-changing input signals into sharply defined, jitter-free
output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V environment.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
5 V tolerant inputs for interfacing with 5 V logic
CMOS low-power consumption
Direct interface with TTL levels
Unlimited input rise and fall times
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Applications
Wave and pulse shapers for highly noisy environments
Astable multivibrator
Monostable multivibrator.

74LVC132AD,118 Related Products

74LVC132AD,118 74LVC132APW,118 74LVC132AD,112 74LVC132ABQ,115
Description IC GATE NAND SCHMITT 4CH 14SO IC GATE NAND SCHMITT 4CH 14TSSOP IC GATE NAND SCHMITT 4CH 14SO IC GATE NAND SCHMIT 4CH 14DHVQFN
Brand Name Nexperia Nexperia Nexperia Nexperia
Maker Nexperia Nexperia Nexperia Nexperia
Parts packaging code SOIC TSSOP SOIC QFN
package instruction 3.90 MM, PLASTIC, MS-012, SOT-108-1, SOP-14 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14 3.90 MM, PLASTIC, MS-012, SOT-108-1, SOP-14 HVQCCN,
Contacts 14 14 14 14
Manufacturer packaging code SOT108-1 SOT402-1 SOT108-1 SOT762-1
Reach Compliance Code compliant compliant compliant compliant
Samacsys Description 74LVC132A - Quad 2-input NAND Schmitt trigger@en-us 74LVC132A - Quad 2-input NAND Schmitt trigger@en-us NXP 74LVC132AD,112, Quad 2-Input NAND Schmitt Trigger Logic Gate, 1.2 → 3.6 V, 14-Pin SOIC 74LVC132A - Quad 2-input NAND Schmitt trigger@en-us
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 R-PQCC-N14
JESD-609 code e4 e4 e4 e4
length 8.65 mm 5 mm 8.65 mm 3 mm
Logic integrated circuit type NAND GATE NAND GATE NAND GATE NAND GATE
Humidity sensitivity level 1 1 1 1
Number of functions 4 4 4 4
Number of entries 2 2 2 2
Number of terminals 14 14 14 14
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP TSSOP SOP HVQCCN
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260 260
propagation delay (tpd) 16 ns 16 ns 16 ns 16 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.1 mm 1.75 mm 1 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.2 V 1.2 V 1.2 V 1.2 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V 1.8 V 1.8 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form GULL WING GULL WING GULL WING NO LEAD
Terminal pitch 1.27 mm 0.65 mm 1.27 mm 0.5 mm
Terminal location DUAL DUAL DUAL QUAD
Maximum time at peak reflow temperature 30 30 30 30
width 3.9 mm 4.4 mm 3.9 mm 2.5 mm
Base Number Matches 1 1 1 1
Is it Rohs certified? conform to conform to conform to -

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