ATtiny807/1607
AVR
®
Microcontroller with Core Independent Peripherals
and picoPower
®
Technology
Introduction
The ATtiny807/1607 microcontrollers are using the high-performance, low-power AVR RISC architecture,
and are capable of running at up to 20 MHz, with up to 8/16 KB Flash, 512/1024 bytes of SRAM, and
128/256 bytes of EEPROM in a 24-pin package. The series uses the latest technologies with a flexible
and low-power architecture including Event System and SleepWalking, accurate analog features and
advanced peripherals.
®
Features
•
CPU:
®
– AVR 8-bit CPU
– Running at up to 20 MHz
– Single cycle I/O access
– Two-level interrupt controller
– Two-cycle hardware multiplier
Memories:
– 8/16 KB In-system self-programmable Flash memory
– 128/256B EEPROM
– 512/1024B SRAM
System:
– Power-on Reset (POR)
– Brown-out Detection (BOD)
– Internal and external clock options with:
• 16/20 MHz low-power internal RC oscillator
• 32.768 kHz Ultra Low Power (ULP) internal RC oscillator with ±10% accuracy, ±2%
calibration step size
• External clock input
– Single pin Unified Program Debug Interface (UPDI)
– Three sleep modes:
• Idle with all peripherals running and mode for immediate wake-up time
• Standby Sleep mode:
– Configurable operation of selected peripherals
– SleepWalking peripherals
• Power-Down Sleep mode with limited wake-up functionality
•
•
©
2018 Microchip Technology Inc.
Datasheet Preliminary
DS40002030A-page 1
ATtiny807/1607
•
Peripherals:
– 3-channel Event System
– One 16-bit Timer/Counter with Dedicated Period register and Three Compare Channels (TCA)
– One 16-bit Timer/Counter type B with Input Capture (TCB)
– One 16-bit Real Time Counter (RTC) running from internal RC oscillator
– One USART with fractional baud rate generator, auto-baud, Start-Of-Frame (SOF) detection, and
Local Interconnect Network (LIN) support
– Master/slave Serial Peripheral Interface (SPI)
– Master/slave TWI with dual address match
•
•
•
–
–
–
–
–
–
•
Standard mode (Sm, 100 kHz)
Fast mode (Fm, 400 kHz)
Fast mode Plus (Fm+, 1 MHz)
Configurable Custom Logic (CCL) with two Programmable Lookup Tables (LUT)
One Analog Comparator (AC) with 150 ns propagation delay
10-bit 150 ksps Analog-to-Digital Converter (ADC)
Five selectable internal voltage references: 0.55V, 1.1V, 1.5V, 2.5V and 4.3V
Automated CRC memory scan
Programmable Watchdog Timer (WDT) with separate on-chip oscillator
•
•
– External interrupt on all general purpose pins
I/O and Packages:
– 24-pin
• 22 Programmable I/O lines
• VQFN 4x4
Temperature Ranges:
– -40°C to 105°C operating range
– -40°C to 125°C temperature graded device options available
Speed Grades:
– T
A
max. 105°C
• 0-5 MHz @ 1.8V – 5.5V
• 0-10 MHz @ 2.7V – 5.5V
• 0-20 MHz @ 4.5V – 5.5V
©
2018 Microchip Technology Inc.
Datasheet Preliminary
DS40002030A-page 2
Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. tinyAVR 0-Series Overview......................................................................................9
1.1.
Configuration Summary..............................................................................................................10
®
2. Ordering Information................................................................................................12
2.1.
2.2.
ATtiny807................................................................................................................................... 12
ATtiny1607................................................................................................................................. 12
3. Block Diagram......................................................................................................... 13
4. Pinout...................................................................................................................... 14
4.1.
24-pin QFN4x4........................................................................................................................... 14
5. I/O Multiplexing and Considerations........................................................................15
5.1.
5.2.
Multiplexed Signals.................................................................................................................... 15
Reset Pin Selection.................................................................................................................... 15
6. Memories.................................................................................................................17
6.1.
6.2.
6.3.
6.4.
6.5.
6.6.
6.7.
6.8.
6.9.
6.10.
Overview.................................................................................................................................... 17
Memory Map.............................................................................................................................. 18
In-System Reprogrammable Flash Program Memory................................................................19
SRAM Data Memory.................................................................................................................. 19
EEPROM Data Memory............................................................................................................. 20
User Row....................................................................................................................................20
Signature Bytes.......................................................................................................................... 20
I/O Memory.................................................................................................................................20
Memory Section Access from CPU and UPDI on Locked Device..............................................23
Configuration and User Fuses (FUSE).......................................................................................24
7. Peripherals and Architecture................................................................................... 43
7.1.
7.2.
7.3.
Peripheral Module Address Map................................................................................................ 43
Interrupt Vector Mapping............................................................................................................ 44
System Configuration (SYSCFG)...............................................................................................45
8. AVR CPU................................................................................................................. 48
8.1.
8.2.
8.3.
8.4.
8.5.
8.6.
8.7.
Features..................................................................................................................................... 48
Overview.................................................................................................................................... 48
Architecture................................................................................................................................ 48
Arithmetic Logic Unit (ALU)........................................................................................................ 50
Functional Description................................................................................................................51
Register Summary - CPU...........................................................................................................56
Register Description................................................................................................................... 56
©
2018 Microchip Technology Inc.
Datasheet Preliminary
DS40002030A-page 3
ATtiny807/1607
9. NVMCTRL - Nonvolatile Memory Controller............................................................61
9.1.
9.2.
9.3.
9.4.
9.5.
Features..................................................................................................................................... 61
Overview.................................................................................................................................... 61
Functional Description................................................................................................................62
Register Summary - NVMCTRL................................................................................................. 69
Register Description................................................................................................................... 69
10. CLKCTRL - Clock Controller................................................................................... 77
10.1.
10.2.
10.3.
10.4.
10.5.
Features..................................................................................................................................... 77
Overview.................................................................................................................................... 77
Functional Description................................................................................................................79
Register Summary - CLKCTRL.................................................................................................. 84
Register Description................................................................................................................... 84
11. SLPCTRL - Sleep Controller................................................................................... 93
11.1.
11.2.
11.3.
11.4.
11.5.
Features..................................................................................................................................... 93
Overview.................................................................................................................................... 93
Functional Description................................................................................................................94
Register Summary - SLPCTRL.................................................................................................. 97
Register Description................................................................................................................... 97
12. RSTCTRL - Reset Controller...................................................................................99
12.1.
12.2.
12.3.
12.4.
12.5.
Features..................................................................................................................................... 99
Overview.................................................................................................................................... 99
Functional Description..............................................................................................................100
Register Summary - RSTCTRL................................................................................................103
Register Description................................................................................................................. 103
13. CPUINT - CPU Interrupt Controller....................................................................... 106
13.1.
13.2.
13.3.
13.4.
13.5.
Features................................................................................................................................... 106
Overview.................................................................................................................................. 106
Functional Description..............................................................................................................108
Register Summary - CPUINT................................................................................................... 115
Register Description................................................................................................................. 115
14. EVSYS - Event System......................................................................................... 120
14.1.
14.2.
14.3.
14.4.
14.5.
Features................................................................................................................................... 120
Overview.................................................................................................................................. 120
Functional Description..............................................................................................................123
Register Summary - EVSYS.................................................................................................... 125
Register Description................................................................................................................. 125
15. PORTMUX - Port Multiplexer................................................................................ 134
15.1. Overview.................................................................................................................................. 134
15.2. Register Summary - PORTMUX.............................................................................................. 135
15.3. Register Description................................................................................................................. 135
16. PORT - I/O Pin Configuration................................................................................ 140
©
2018 Microchip Technology Inc.
Datasheet Preliminary
DS40002030A-page 4
ATtiny807/1607
16.1.
16.2.
16.3.
16.4.
16.5.
16.6.
16.7.
Features................................................................................................................................... 140
Overview.................................................................................................................................. 140
Functional Description..............................................................................................................142
Register Summary - PORT...................................................................................................... 146
Register Description - Ports..................................................................................................... 146
Register Summary - VPORT.................................................................................................... 158
Register Description - Virtual Ports.......................................................................................... 158
17. BOD - Brown-out Detector.....................................................................................163
17.1.
17.2.
17.3.
17.4.
17.5.
Features................................................................................................................................... 163
Overview.................................................................................................................................. 163
Functional Description..............................................................................................................165
Register Summary - BOD.........................................................................................................167
Register Description................................................................................................................. 167
18. VREF - Voltage Reference.................................................................................... 174
18.1.
18.2.
18.3.
18.4.
18.5.
Features................................................................................................................................... 174
Overview.................................................................................................................................. 174
Functional Description..............................................................................................................174
Register Summary - VREF.......................................................................................................176
Register Description................................................................................................................. 176
19. WDT - Watchdog Timer......................................................................................... 179
19.1.
19.2.
19.3.
19.4.
19.5.
Features................................................................................................................................... 179
Overview.................................................................................................................................. 179
Functional Description..............................................................................................................181
Register Summary - WDT........................................................................................................ 185
Register Description................................................................................................................. 185
20. TCA - 16-bit Timer/Counter Type A....................................................................... 189
20.1.
20.2.
20.3.
20.4.
20.5.
20.6.
20.7.
Features................................................................................................................................... 189
Overview.................................................................................................................................. 189
Functional Description..............................................................................................................193
Register Summary - TCA in Normal Mode (CTRLD.SPLITM=0)............................................. 204
Register Description - Normal Mode........................................................................................ 205
Register Summary - TCA in Split Mode (CTRLD.SPLITM=1).................................................. 225
Register Description - Split Mode.............................................................................................225
21. TCB - 16-bit Timer/Counter Type B....................................................................... 241
21.1.
21.2.
21.3.
21.4.
21.5.
Features................................................................................................................................... 241
Overview.................................................................................................................................. 241
Functional Description..............................................................................................................244
Register Summary - TCB......................................................................................................... 252
Register Description................................................................................................................. 252
22. RTC - Real-Time Counter......................................................................................264
22.1. Features................................................................................................................................... 264
22.2. Overview.................................................................................................................................. 264
©
2018 Microchip Technology Inc.
Datasheet Preliminary
DS40002030A-page 5
京公网安备 11010802033920号
EEWORLD
