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LM2636 5-Bit Programmable Synchronous Buck Regulator Controller
OBSOLETE
LM2636
5-Bit Programmable Synchronous Buck Regulator
Controller
General Description
The LM2636 is a high speed controller designed specifically
for use in synchronous DC/DC buck converters for advance
d microprocessors. A 5-bit DAC accepts the VID code directly
from the CPU and adjusts the output voltage from 1.3V to
3.5V. It provides the power good, over-voltage protection, and
output enable features as required by Intel VRM specifica-
tions. Current limiting is achieved by monitoring the voltage
drop across the r
DS_ON
of the high side MOSFET, which elim-
inates an expensive current sense resistor.
The LM2636 employs a fixed-frequency voltage mode PWM
architecture. To provide a faster response to a large and fast
load transient, two ultra-fast comparators are built in to mon-
itor the output voltage and override the primary control loop
when necessary. The PWM frequency is adjustable from 50
kHz to 1 MHz through an external resistor. The wide range of
PWM frequency gives the power supply designer the flexibility
to make trade-offs between load transient response perfor-
mance, MOSFET cost and the overall efficiency. The adap-
tive non-overlapping MOSFET gate drivers help avoid any
potential shoot-through problem while maintaining high effi-
ciency. BiCMOS gate drivers with rail-to-rail swing ensure that
no spurious turn-on occur. When only 5V is available, a boot-
strap structure can be employed to accommodate an NMOS
high side switch. The precision reference trimmed to 2.5%
over temperature is available externally for use by other reg-
August 25, 2011
ulators. Dynamic positioning of load voltage, which helps cut
the number of output capacitors, can also be implemented
easily.
Features
■
■
■
■
■
■
■
■
■
■
■
1.3V to 3.5V 5-bit programmable output voltage
Synchronous rectification
Power Good flag and output enable
Over-voltage protection
Initial Output Accuracy: 1.5% over temperature
Current limit without external sense resistor
Adaptive non-overlapping MOSFET gate drives
Adjustable switching frequency: 50 kHz to 1 MHz
Dynamic output voltage positioning
1.256V reference voltage available externally
Plastic SO-20 package and TSSOP-20 package
Applications
■
Motherboard power supply/VRM for Cyrix Gxm, Cyrix Gxi,
Cyrix MII, Pentium™ II, Pentium Pro, 6x86 and K6
processors
■
5V to 1.3V–3.5V high current power supplies
Connection Diagrams
TOP VIEW
TOP VIEW
10083403
10083403
Plastic SO-20
Order Number LM2636M
See NS Package Number M20B
Plastic TSSOP-20
Order Number LM2636MTC
See NS Package Number MTC20
Pentium™ is a trademark of Intel Corporation.
© 2011 National Semiconductor Corporation
100834
Print Date/Time: 2011/08/25 17:16:50
www.national.com
100834 Version 9 Revision 4
LM2636
Typical Application
10083401
FIGURE 1. 5V to 1.3V–3.5V, 14A Power Supply
Pin Descriptions
LSGATE (Pin 1):
Gate drive for the low-side N-channel MOS-
FET. This signal is interlocked with HSGATE (Pin 20) to avoid
a shoot-through problem.
BOOTV (Pin 2):
Power supply for high-side N-channel MOS-
FET gate drive. The voltage should be at least one gate
threshold above the converter input voltage to properly oper-
ate the high-side N-FET.
PGND (Pin 3):
Ground for high current circuitry. It should be
connected to system ground.
SGND (Pin 4):
Ground for signal level circuitry. It should be
connected to system ground.
V
CC
(Pin 5):
Power supply for the controller.
SENSE (Pin 6):
Converter output voltage sensing. It provides
input for power good, fast dual comparator control loop, and
over-voltage protection circuitry. It is recommended that a 0.1
µF capacitor be connected between this pin and ground to
avoid potential noise problems.
IMAX (Pin 7):
Current limit threshold setting. It sinks a fixed
180 µA current. By connecting a resistor between the high
side MOSFET drain and this pin, a fixed voltage drop can be
built across the resistor. This voltage drop is compared with
the V
DS
of the high-side N-MOSFET to determine if an over-
current condition has occurred.
IFB (Pin 8):
High-side N-MOSFET source voltage sensing.
This pin is one V
DS
below drain voltage. When this voltage is
lower than that of IMAX pin during the time the high-side FET
is on, it means V
DS
is higher than the preset voltage across
the IMAX resistor, which can be interpreted as an over-current
condition.
V
REF
(Pin 9):
Bandgap reference voltage. This voltage is
mainly for use by other power supplies on the motherboard
which need a reference.
EA_OUT (Pin 10):
Output of the error amplifier. The voltage
level on this pin is compared with an internally generated
ramp signal to determine the duty cycle. This pin is necessary
for compensating the primary control loop.
FB (Pin 11):
Inverting input of the error amplifier. A pin nec-
essary for compensating the control loop.
FREQ_ADJ (Pin 12):
Switching frequency adjustment.
Switching frequency can be adjusted by changing the ground-
ing resistance on this pin.
PWRGD (Pin 13):
Power Good. There are two windows
around the DAC output voltage that are associated with
PWRGD pin, the ±10% window and the ±8% window. If
PWRGD is initially high (open drain state) and output voltage
travels out of ±10% window, PWRGD goes to low (low
impedance to ground). If PWRGD is initially low and output
voltage travels into the ±8% window and has stayed within
the window for at least 10 ms, PWRGD goes to high. A
PWRGD high means the output voltage is at least within the
±10% window whereas a PWRGD low indicates the output
voltage is definitely outside the ±8% window.
VID4:0 (Pins 14, 15, 16, 17, 18):
Voltage Identification Code.
The five pins accept an open-ground pattern 5-bit binary code
from outside the chip (typically from the CPU) for generating
the desired output voltage. Each VID pin is internally pulled
up to V
CC
via a 90 µA current source.
Table 1
shows the code
table.
www.national.com
100834 Version 9 Revision 4
2
Print Date/Time: 2011/08/25 17:16:50
LM2636
OUTEN (Pin 19):
Output Enable. The output voltage is dis-
abled when this pin is pulled low. It is internally pulled up to
V
CC
via a 90 µA current source.
HSGATE (Pin 20):
Gate drive for the high-side N-channel
MOSFET. This signal is interlocked with LSGATE (Pin 1) to
avoid a shoot-through problem.
TABLE 1. VID Code and DAC Output
V
ID4
V
ID3
V
ID2
V
ID1
V
ID0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Rated Output
Voltage (V)
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
(shutdown)
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3
100834 Version 9 Revision 4
Print Date/Time: 2011/08/25 17:16:50
www.national.com
LM2636
Absolute Maximum Ratings
(Note
1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(All voltages are referenced to the PGND and SGND pins.)
V
CC
7V
BOOTV
18V
Junction Temperature
150°C
DC Power Dissipation (Note
2)
1.42W
Storage Temperature
−65°C to +150°C
Soldering Time, Temperature
Wave (4 seconds)
Infrared (10 seconds)
Vapor Phase (75 seconds)
ESD Susceptibility (Note
3)
260°C
240°C
219°C
2 kV
Recommended Operating
Conditions
(Note
1)
Supply Voltage Range (V
CC
)
Junction Temperature Range
4.5V to 5.5V
0°C to +125°C
Electrical Characteristics
V
CC
= 5V unless otherwise indicated under the
Conditions
column. Typicals and limits appearing in plain type apply for T
A
= T
J
=
+25°C. Limits appearing in
boldface
type apply over 0°C to +70°C.
Symbol
V
BOOTV
V
DACOUT
Parameter
FET Driver Supply Voltage
5-Bit DAC Output Voltage
VID4:0=01111
VID4:0=01101
VID4:0=01011
VID4:0=01001
VID4:0=00111
VID4:0=00101
VID4:0=00001
VID4:0=11101
VID4:0=11010
VID4:0=10111
ΔV
OUT
G
EA
SR
EA
BW
EA
I
Q_V
CC
I
Q_BOOTV
D
MAX
D
MIN
R
SENSE
R
DS_SRC
DC Load Regulation
DC Line Regulation
Error Amplifier DC Gain
Error Amplifier Slew Rate
Error Amplifier Unity Gain
Bandwidth
Operating V
CC
Current
Shutdown V
CC
Current
BOOTV Pin Quiescent
Current
Maximum Duty Cycle
Minimum Duty Cycle
SENSE Pin Resistance to
Ground
FET Driver Drain-Source
ON Resistance when
Sourcing Current
FET Driver Drain-Source
ON Resistance when
Sinking Current
Oscillator Frequency
BOOTV=5V
7
(Independent of BOOTV Voltage)
1.7
R
FA
= 84 kΩ
R
FA
= 22 kΩ
R
FA
= 10.5 kΩ
I
MAX
IMAX Pin Sink Current
V
IMAX
= 5V, V
IFB
= 6V, V
CC
= 5V
130
250
300
1000
2000
180
230
µA
350
kHz
Ω
Ω
7
OUTEN=V
CC
=5V, VID=10111
OUTEN Floating, VID0:4 Floating
BOOTV=12V, OUTEN=0, VID0:4 Floating
1.5
1
I
OUT
=0 to 14A
Figure 2
V
IN
=4.75V to 5.25V
Figure 2
1.284
1.385
1.483
1.585
1.683
1.784
1.983
2.173
2.471
2.768
1.304
1.406
1.506
1.609
1.709
1.811
2.013
2.206
2.509
2.81
−5
1
85
6
5
2.5
1.5
4
90
0
11.5
16
4
3
Conditions
Min
Typ
Max
18
1.324
1.427
1.529
1.633
1.735
1.838
2.043
2.239
2.547
2.852
mV
dB
V/µs
MHz
mA
µA
%
%
kΩ
V
Units
V
R
DS_SINK
f
OSC
www.national.com
100834 Version 9 Revision 4
4
Print Date/Time: 2011/08/25 17:16:50
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