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LM2637 Motherboard Power Supply Solution with a 5-Bit Programmable Switching Controller and
Two Linear Regulator Controllers
November 2004
LM2637
Motherboard Power Supply Solution with a 5-Bit
Programmable Switching Controller and Two Linear
Regulator Controllers
General Description
The LM2637 provides a comprehensive embedded power
supply solution for motherboards hosting high performance
MPUs such as M II
™
, Pentium
™
II, K6-2 and other similar
high performance MPUs. The LM2637 incorporates a 5-bit
programmable, synchronous buck switching controller and
two high-speed linear regulator controllers in a 24-pin SO
package.
Switching Section
— The switching regulator controller fea-
tures a 5-bit programmable DAC, over-current and over-
voltage protection, under-voltage latch-off, a power good
signal, and output enable. The 5-bit DAC has a typical
tolerance of 1%. There are two user-selectable over-current
protection methods. One provides accurate over-current pro-
tection with the use of an external sense resistor. The other
saves cost by taking advantage of the r
DS_ON
of the high-
side FET. The over voltage protection provides two levels of
protection. The first level keeps the high-side FET off and the
low-side FET on. The second provides a gate signal that can
be used to fire an external SCR.
Linear Section
— The two linear regulator controllers fea-
ture wide control bandwidth, N-FET and NPN transistor driv-
ing capability, and an adjustable output voltage. The wide
control bandwidth makes meeting fast load transient re-
sponse requirement such as that of the GTL+ bus an easy
job. In minimum configuration, the two controllers default to
1.5V and 2.5V respectively.
Both linear controllers have under voltage latch-off.
Features
n
Provides 3 regulated voltages
n
Power Good flag and output enable
n
Under-voltage latch-off
Switching Section
n
Synchronous rectification
n
5-bit DAC programmable from 3.5V to 1.3V
n
Typical 1% DAC tolerance
n
Switching frequency: 50 kHz to 1 MHz
n
Two levels of over-voltage protection
n
Two methods of over-current protection
n
Adaptive non-overlapping FET gate drives
n
Soft start without external capacitor
Linear Section
n
N-FET and NPN driving capability
n
Ultra fast response speed
n
Output voltages default to 1.5V and 2.5V yet adjustable
Applications
n
Embedded power supplies for PC motherboards
n
Triple DC/DC power supplies
n
Programmable high current DC/DC power supply
Pin Configuration
24-Lead SOIC
10084801
Top View
NS Package Number M24B
M II
™
is a trademark of Cyrix Corporation a wholly owned subsidiary of National Semiconductor Corporation.
Pentium
™
is a trademark of Intel Corporation.
K6 is trademark of Advanced Micro Devices, Inc.
© 2004 National Semiconductor Corporation
DS100848
www.national.com
LM2637
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
CC
V
DD
Junction Temperature
Power Dissipation (Note 2)
7V
17V
150˚C
1.6W
Storage Temperature
ESD Susceptibility
Soldering Time, Temperature (10 sec.)
−65˚C to +150˚C
2.5 kV
300˚C
Operating Ratings
(Note 1)
V
CC
Junction Temperature Range
4.75V to 5.25V
0˚C to +125˚C
Electrical Characteristics
V
CC
= 5V, V
DD
= 12V unless otherwise specified. Typicals and limits appearing in plain type apply for T
A
= T
J
= +25˚C. Limits
appearing in
boldface
type apply over the 0˚C to +70˚C range.
Symbol
I
EN
I
VID
I
CC
I
Q_VCC
V
DACOUT
I
Q_VDD
f
OSC
D
MAX
D
MIN
R
SNS1
R
DS_SRC
R
DS_SINK
V
CC_TH1
V
CC_TH2
V
DAC_IH
V
DAC_IL
t
PWGD
t
PWBAD
V
PWGD_HI
Parameter
EN Pin internal Pull-Up Current
VID Pins internal Pull-Up Current
Operating V
CC
Current
V
CC
Shutdown Current
5-Bit DAC Output Voltage
V
DD
Shutdown Current
Oscillator Frequency
Maximum Duty Cycle
Minimum Duty Cycle
SNS1 Pin Resistance to Ground
Gate Driver Resistance When
Sourcing Current
Gate Driver Resistance When
Sinking Current
Rising V
CC
Threshold for
Power-On Reset
Falling V
CC
Threshold for
Power-On Reset
DAC Input High Voltage
DAC Input Low Voltage
PWGD Response Time
PWGD Response Time
PWGD High Trip Point
SNS1 Rises from 0V to Rated
Output Voltage
SNS1 Falls from Rated Output
Voltage to 0V
% Above Rated Output Voltage
when output Voltage
↑
% Above Rated Output Voltage
when output Voltage↓ (Note 4)
V
PWGD_LO
PWGD Low Trip Point
% Below Rated Output Voltage
when output Voltage
↑
% Below Rated Output Voltage
when output Voltage↓ (Note 4)
V
OVP_TRP
I
CS+
V
OCP
I
OVP
GA
OVP Pin Trip Point
CS+ Pin Sink Current
Over-Current Trip Point (CS+
and CS− Differential Voltage)
OVP Pin Source Current
Error Amplifier DC Gain
% SNS1 Above Rated Output
CS+ = 5V
CS+ = 2V, CS− Drops from 2V
OVP = 3V
6
15
126
41
10
76
5
2
2
8.4
3.4
11.5
7
2.6
9.5
18
185
55
3.0
3.5
1.3
15
10
13
9
6
13
21
244
69
%
µA
mV
mA
dB
%
8.5
EN = 5V, VID = 10111
EN = 0V, VID Pins Floating
(Note 3)
EN = 0V, VID Pins Floating
RT = 100 kΩ
RT = 25 kΩ
204
N−1.5%
Conditions
Min
60
60
Typ
90
90
6
1.5
N
4
245
1000
95
0
10
6
1.5
4
3.6
4.3
13
286
Max
140
140
7.5
3
N+1.5%
Units
µA
µA
mA
mA
V
µA
kHz
%
%
kΩ
Ω
Ω
V
V
V
V
µs
µs
%
SWITCHING SECTION
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2
LM2637
Electrical Characteristics
Symbol
B
WEA
V
RAMP_L
V
RAMP_H
t
SS
D
STEP_SS
Parameter
Error Amplifier Unity Gain
Bandwidth
Ramp Signal Valley Voltage
Ramp Signal Peak Voltage
Soft Start Time
(Continued)
V
CC
= 5V, V
DD
= 12V unless otherwise specified. Typicals and limits appearing in plain type apply for T
A
= T
J
= +25˚C. Limits
appearing in
boldface
type apply over the 0˚C to +70˚C range.
Conditions
Min
Typ
5
1.25
3.25
4096
12.5
Max
Units
MHz
V
V
Clock
Cycles
%
Duty Cycle Step Change in Soft
Start
SNS2 Voltage
V
DD
= 12V, V
CC
= 4.75V to
5.25V, I
G2
= 0 mA to 20 mA
(Figure
1)
When Regulating
(Note 4)
(Note 4)
V
DD
= 12V, V
CC
= 4.75V to
5.25V, I
G3
= 0 mA to 20 mA
(Figure
1)
When Regulating
(Note 4)
(Note 4)
1.5V LDO CONTROLLER SECTION
V
SNS2
1.463
1.5
200
21
0.63
0.44
1.538
V
Ω
µA
V
V
R
OUT2
I
SNS2
V
PWGD_HI
V
PWGD_LO
V
SNS3
Output Resistance
SNS2 Pin Bias Current
PWGD High Trip Point
PWGD Low Trip Point
SNS3 Voltage
2.5V LDO CONTROLLER SECTION
2.438
2.5
200
21
0.63
0.44
2.563
V
Ω
µA
V
V
R
OUT3
I
SNS3
V
PWGD_HI
V
PWGD_LO
Output Resistance
SNS3 Pin Bias Current
PWGD High Trip Point
PWGD Low Trip Point
Note 1: Absolute Maximum Ratings
are limits beyond which damage to the device may occur. Operating ratings are conditions under which the device operates
correctly.
Operating Ratings
do not imply guaranteed performance limits.
Note 2:
Maximum allowable power dissipation is a function of the maximum junction temperature, T
JMAX
, the junction-to-ambient thermal resistance,
θ
JA
, and the
ambient temperature, T
A
. The maximum allowable power dissipation at any ambient temperature is calculated using:
P
MAX
= (T
JMAX
− T
A
)/θ
JA
.
The junction-to-
ambient thermal resistance,
θ
JA
, for LM2637 is 78˚C/W. For a T
JMAX
of 150˚C and T
A
of 25˚C, the maximum allowable power dissipation is 1.6W.
Note 3:
The letter
N
stands for the typical output voltages appearing in
italic boldface
type in
Table 1.
Note 4:
The output level of the PWGD pin is a logic AND of the power good function of the switching section, the 1.5V section and the 2.5V section.
3
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LM2637
(V
CC
= 5V, V
DD
Symbol
V
DACOUT
TABLE 1. 5-Bit DAC Output Voltage Table
= 12V
±
5%, T
A
= 25˚C, Test Mode)
Parameter
Conditions
VID4:0 = 01111
VID4:0 = 01110
VID4:0 = 01101
VID4:0 = 01100
VID4:0 = 01011
VID4:0 = 01010
VID4:0 = 01001
VID4:0 = 01000
VID4:0 = 00111
VID4:0 = 00110
VID4:0 = 00101
VID4:0 = 00100
VID4:0 = 00011
VID4:0 = 00010
VID4:0 = 00001
VID4:0 = 00000
VID4:0 = 11111
VID4:0 = 11110
VID4:0 = 11101
VID4:0 = 11100
VID4:0 = 11011
VID4:0 = 11010
VID4:0 = 11001
VID4:0 = 11000
VID4:0 = 10111
VID4:0 = 10110
VID4:0 = 10101
VID4:0 = 10100
VID4:0 = 10011
VID4:0 = 10010
VID4:0 = 10001
VID4:0 = 10000
Typical
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
(shutdown)
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
Units
V
5-Bit DAC Output Voltages for Different VID Codes
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4