Minimum current for transient load response testing only. Unit is designed to operate and be within output regulation range at zero load.
DS250SPE Data Sheet
Electrical Specifications
Protections
Main Output
Overcurrent protection
2
Overvoltage protection
1
Undervoltage protection
Overtemperature protection
Fan fault protection
Standby Output
Overcurrent protection
3
Overvoltage protection
3
Undervoltage protection
1
2
3
MIN
115%
13.5 V
10.5 V
NOM
MAX
150%
15.0 V
11.0 V
Yes
Yes
120%
13.5 V
10.0 V
150%
15.0 V
11.0 V
Latch mode
Autorecovery if the overcurrent is less than 115% and last only for <500 ms
Standby protection is auto-recovery
Ordering Information
Model Number
Nominal Main Output
Standby Output
Airflow Direction
DS250SPE-3
DS250SPE-3-001
12 V @ 20.8 A
12 V @ 20.8 A
12 V @ 3 A
12 V @ 3 A
Standard (forward)
Reverse
Control and Status Signals
Input Signals
PSON_L
Active LOW signal which enables/disables the main output. Pulling this signal LOW will turn-on the main output. Recommended pull-up resistor to 12 VSB is 8.2 k
with a 3.0 k pull-down to ground. A 100 pF decoupling capacitor is also recommended.
MIN
V
IL
V
IH
I
SOURCE
I
SINK
PSKILL_L
First break/last mate active LOW signal which enables/disables the main output. This signal will have to be pulled to ground at the system side with a 220 ohm
resistor. A 100 pF decoupling capacitor is also recommended.
MIN
V
IL
V
IH
I
SOURCE
I
SINK
Input logic level LOW
Input logic level HIGH
Current that may be sourced by this pin
Current that may be sunk by this pin at low state
2.0 V
MAX
0.8 V
5.0 V
2 mA
0.5 mA
Input logic level LOW
Input logic level HIGH
Current that may be sourced by this pin
Current that may be sunk by this pin at low state
2.0 V
MAX
0.8 V
5.0 V
2 mA
0.5 mA
DS250SPE Data Sheet
Control and Status Signals
Output Signals
ACOK
Signal used to indicate the presence of AC input to the power supply. A logic level HIGH will indicate that the AC input to the power supply is within the operating
range while a logic level LOW will indicate that AC has been lost.
This is an open collector/drain output. This pin is pulled high by a 1.0 kohm resistor connected to 3.3 V inside the power supply. It is recommended that this pin be
connected to a 100 pF decoupling capacitor and pulled down by a 100 kohm resistor.
MIN
V
OL
V
OH
I
SOURCE
I
SINK
PWR_GOOD/PWOK
Signal used to indicate that main output voltage is within regulation range. The PWR_GOOD signal will be driven HIGH when the output voltage is valid and will be
driven LOW when the output falls below the under-voltage threshold.
This signal also gives an advance warning when there is an impending power loss due to loss of AC input or system shutdown request. More details in the Timing Section.
This is an open collector/drain output. This pin is pulled high by a 1.0 kohm resistor connected to 3.3 V inside the power supply. It is recommended that this pin be
connected to a 100 pF decoupling capacitor and pulled down by a 10 kohm resistor.
MIN
V
OL
V
OH
I
SOURCE
I
SINK
PS_PRESENT
Signal used to indicate to the system that a power supply is inserted in the power bay. This pin is shorted to the standby return in the power supply. Recommended
pull-up resistor to 12 VSB is 8.2 k with a 3.0 k pull-down to ground. A 100 pF decoupling capacitor is also recommended.
PS_INTERRUPT_L
Active low signal used by the power supply to indicate to the system that a change in power supply status has occurred. This event can be triggered by faults such
as OVP, OCP, OTP, and fan fault. This signal can be cleared by a CLEAR_FAULT command. Recommended pull-up resistor to 12 VSB is 8.2 k with a 3.0 k
pull-down to ground. A 100 pF decoupling capacitor is also recommended.
MIN
V
OL
V
OH
I
SOURCE
I
SINK
Output logic level LOW
Output logic level HIGH
Current that may be sourced by this pin
Current that may be sunk by this pin at low state
2.0 V
MAX
0.8 V
5.0 V
4 mA
4 mA
Output logic level LOW
Output logic level HIGH
Current that may be sourced by this pin
Current that may be sunk by this pin at low state
2.0 V
MAX
0.8 V
5.0 V
3.3 mA
0.7 mA
Output logic level LOW
Output logic level HIGH
Current that may be sourced by this pin
Current that may be sunk by this pin at low state
2.0 V
MAX
0.6 V
5.0 V
3.3 mA
0.7 mA
BUS Signals
ISHARE
Bus signal used by the power supply for active current sharing. All power supplies configured in the system for n+n sharing will refer to this bus voltage inorder to
load share.
Voltage Range
I
SHARE
Voltage
The range of this signal for active sharing will be up to 8.0 V, which corresponds to the maximum output current.
MIN
Vshare at 100% load, stand-alone unit
Voltage at 50% load, stand-alone unit
Voltage at 0% load, stand-alone unit
I
SOURCE
SCL, SDA
Clock and data signals defined as per I
2
C requirements. It is recommended that these pins be pulled-up to a 2.2 kohm resistor to 3.3 V and a 100 pF decoupling
capacitor at the system side.
VL
VH
Input logic level LOW
Input logic level HIGH
2.0 V
0.8 V
5.0 V
Current that may be sourced by this pin
7.75
3.85
0
MAX
8.25
4.15
0.3
160 mA
Note:
All signal noise levels are below 400 mVpk-pk from 0 - 100 MHz.
I
2
C Addressing Table: Not applicable.
This power supply has a fixed I
2
C address. In order to support multiple addresses, the system will have to utilize a switcher or an I
2
C expander.
DS250SPE Data Sheet
Electrical Specifications
LED Indicators
A single bi-color LED is used to indicate the power supply status.
Status LED
No AC input to PSU
Main output ON
Standby mode or Power supply failure (OCP, OVP, OTP, FAN FAULT)
Off
Solid GREEN
Blinking AMBER
Firmware Reporting And Monitoring
Accuracy Range
Output loading
Input voltage
Input current
Input power
Output voltage
Output current
Temperature
Fan speed
1.5 A fixed error
±5 °C on the operating range
Actual RPM ±250 RPM
±0.4 A fixed error
±15 W
±5%
±15%
10 to 50%
±5%
5%
±5%
50 to 100%
PMBus
Remote ON/OFF
YES
YES
Timing Specifications
Description
T
sb_On
T
sb_ACOK
T
sb_Vout
T
AC_On_Delay
T
PWR_GOOD_On
T
ACOK_Delay
T
PWR_GOOD_Hold-up
T
Vout_Hold-up
T
sb_Hold-up
T
PWR_GOOD_Off
T
PSON_On_Delay
T
PWOK_Low
Delay from AC being applied to standby output being within regulation
Delay from standby output to ACOK assertion
Delay from standby output to main output voltage being within regulation
Delay from AC being applied to main output being within regulation
Delay from output voltages within regulation limits to PWOK asserted
Delay from loss of AC to assertion of ACOK
Delay from loss of AC to deassertion of PWOK
Delay from loss of AC to main output being within regulation
Delay from loss of AC to standby output being within regulation
Delay from deassertion of PWOK to output falling out of regulation
Delay from PSON assertion to output being within regulation
Duration of PWOK being in deasserted state during an ON/OFF cycle of PSU
N/A
10
11
150
1
150
N/A
100
Min
20
See note below
Max
2000
20
300
2300
1000
7
Unit
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
Note:
T
vout_hold-up
: tested at 1A load on standby output
T
sb_ACOK
: ACOK can assert earlier than the standby output
DS250SPE Data Sheet
Timing Diagram
AC Input
T
sb_On
T
ACOK_Delay
Vout_stby
T
sb_Vout
ACOK
T
sb_ACOK
T
sb_Hold-up
T
AC_On_Delay
T
Vout_Hold-up
Vout_main
T
PWOK_On
PWOK
T
PWOK_Hold-up
T
PSON_On_Delay
T
PWOK_Off
PSON
Environmental Specifications
Operating temperature
Operating altitude
Operating relative humidity
Non-operating temperature
Non-operating relative humidity
Non-operating altitude
Vibration and shock
ROHS compliance
MTBF
Operating life
Reliability
0 to 50 °C, withstand operation up to 60 °C at 200 W output power without damage
up to 10,000 feet at 35 °C, 250 W
10% to 95% non-condensing
-40 to +70 °C
10% to 95% non-condensing
up to 50,000 feet
Standard operating/non-operating random shock and vibration
Yes
200,000 hours
Minimum of 5 years at typical conditions
All electronic component derating analysis and capacitor life calculation is done at maximum ambient, 80% of maximum
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Embedded System
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