DS2505+T&R; datasheet, PDF - EEWORLD Datasheet

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DS2505+T&R;: DescriptionIC EPROM 16K 1WIRE TO92-3; Categorystorage; File Size587KB，24 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html; Environmental Compliance

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DS2505+T&R; Overview

IC EPROM 16K 1WIRE TO92-3

DS2505+T&R; Parametric

Parameter Name	Attribute value
memory type	non-volatile
memory format	EPROM
technology	EPROM - OTP
storage	16Kb （16K x 1）
Write cycle time - words, pages	-
interview time	15µs
memory interface	1-Wire®
Voltage - Power	-
Operating temperature	-40°C ~ 85°C（TA）
Installation type	Through hole
Package/casing	TO-226-3, TO-92-3 (TO-226AA) (formed lead)
Supplier device packaging	TO-92-3

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DS2505

16Kb Add-Only Memory

www.maxim-ic.com

FEATURES



16384 bits Electrically Programmable Read

Only Memory (EPROM) communicates with

the economy of one signal plus ground

Unique, factory-lasered and tested 64-bit

registration number (8-bit family code +

48-bit serial number + 8-bit CRC tester)

assures absolute traceability because no two

parts are alike

Built-in

multidrop

controller

ensures

compatibility with other 1-Wire Net

products

EPROM partitioned into sixty-four 256-bit

pages for randomly accessing packetized data

records

Each memory page can be permanently write-

protected to prevent tampering

Device is an “add only” memory where

additional data can be programmed into

EPROM without disturbing existing data

Architecture allows software to patch data by

superseding an old page in favor of a newly

programmed page

Reduces control, address, data, power, and

programming signals to a single data pin

Directly connects to a single port pin of a

microprocessor and communicates at up to

16.3 kbits per second

8-bit family code specifies DS2505

communications requirements to reader

Presence detector acknowledges when the

reader first applies voltage

Low cost TO-92 or 6-pin TSOC surface

mount package

Reads over a wide voltage range of 2.8V to

6.0V from -40°C to +85°C; programs at

11.5V to 12.0V from -40°C to +50°C

PIN ASSIGNMENT

TO-92

DALLAS

DS2505

TSOC PACKAGE

GND

DATA

Top View

3.7 X 4.0 X 1.5 mm



Side View

See Mech.

Drawing Section

GND

DATA

1 2 3

Bottom View

NOTE:

The leads of TO-92 packages on tape-

and-reel are formed to approximately 100 mil

(2.54 mm) spacing. For details see the

Package

Information

section.

ORDERING INFORMATION

DS2505

DS2505/T&R

DS2505P

DS2505P/T&R

DS2505+

DS2505+T&R

DS2505P+

DS2505P+T&R

TO-92 Package

TO-92 Package, Tape & Reel

TSOC Package

TSOC Package, Tape & Reel

TO-92 Package

TO-92 Package, Tape & Reel

TSOC Package

TSOC Package, Tape & Reel

+ Denotes a lead(Pb)-free/RoHS-compliant

package.

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

1 of 24

071107

DS2505

SILICON LABEL DESCRIPTION

The DS2505 16Kb Add–Only Memory identifies and stores relevant information about the product to

which it is associated. This lot or product specific information can be accessed with minimal interface,

for example a single port pin of a microcontroller. The DS2505 consists of a factory-lasered registration

number that includes a unique 48-bit serial number, an 8-bit CRC, and an 8-bit Family Code (0BH) plus

16Kb of user-programmable EPROM. The power to program and read the DS2505 is derived entirely

from the 1-Wire

communication line. Data is transferred serially via the 1-Wire protocol which requires

only a single data lead and a ground return. The entire device can be programmed and then write-

protected if desired. Alternatively, the part may be programmed multiple times with new data being

appended to, but not overwriting, existing data with each subsequent programming of the device. Note:

Individual bits can be changed only from a logical 1 to a logical 0, never from a logical 0 to a logical 1.

A provision is also included for indicating that a certain page or pages of data are no longer valid and

have been replaced with new or updated data that is now residing at an alternate page address. This page

address redirection allows software to patch data and enhance the flexibility of the device as a standalone

database. The 48-bit serial number that is factory-lasered into each DS2505 provides a guaranteed-

unique identity which allows for absolute traceability. The TO-92 and TSOC packages provide a

compact enclosure that allows standard assembly equipment to handle the device easily for attachment to

printed circuit boards or wiring. Typical applications include storage of calibration constants,

maintenance records, asset tracking, product revision status and access codes.

OVERVIEW

The block diagram in Figure 1 shows the relationships between the major control and memory sections of

the DS2505. The DS2505 has three main data components: 1) 64-bit lasered ROM, 2) 16384-bits

EPROM Data Memory, and 3) 704 bits EPROM Status Memory. The device derives its power for read

operations entirely from the 1-Wire communication line by storing energy on an internal capacitor during

periods of time when the signal line is high and continues to operate off of this “parasite” power source

during the low times of the 1-Wire line until it returns high to replenish the parasite (capacitor) supply.

During programming, 1-Wire communication occurs at normal voltage levels and then is pulsed

momentarily to the programming voltage to cause the selected EPROM bits to be programmed. The

1-Wire line must be able to provide 12 volts and 10 milliamperes to adequately program the EPROM

portions of the part. Whenever programming voltages are present on the 1-Wire line a special high

voltage detect circuit within the DS2505 generates an internal logic signal to indicate this condition. The

hierarchical structure of the 1-Wire protocol is shown in Figure 2. The bus master must first provide one

of the four ROM Function Commands: 1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM.

These commands operate on the 64-bit lasered ROM portion of each device and can singulate a specific

device if many are present on the 1-Wire line as well as indicate to the bus master how many and what

types of devices are present. The protocol required for these ROM Function Commands is described in

Figure 8. After a ROM Function Command is successfully executed, the memory functions that operate

on the EPROM portions of the DS2505 become accessible and the bus master may issue any one of the

five Memory Function Commands specific to the DS2505 to read or program the various data fields. The

protocol for these Memory Function Commands is described in Figure 5. All data is read and written

least significant bit first.

64-BIT LASERED ROM

Each DS2505 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code.

The next 48 bits are a unique serial number. The last 8 bits are a CRC of the first 56 bits. (See Figure 3.)

The 64-bit ROM and ROM Function Control section allow the DS2505 to operate as a 1-Wire device and

follow the 1-Wire protocol detailed in the section “1-Wire Bus System.” The memory functions required

to read and program the EPROM sections of the DS2505 are not accessible until the ROM function

2 of 24

DS2505

EPROM STATUS BYTES

In addition to the 16384 bits of data memory the DS2505 provides 704 bits of Status Memory accessible

with separate commands.

The EPROM Status Bytes can be read or programmed to indicate various conditions to the software

interrogating the DS2505. The first 8 bytes of the EPROM Status Memory (addresses 000 to 007H)

contain the Write Protect Page bits which inhibit programming of the corresponding page in the 16384-bit

main memory area if the appropriate write protection bit is programmed. Once a bit has been

programmed in the Write Protect Page section of the Status Memory, the entire 32-byte page that

corresponds to that bit can no longer be altered but may still be read.

The next 8 bytes of the EPROM Status Memory (addresses 020 to 027H) contain the Write Protect bits

which inhibit altering the Page Address Redirection Byte corresponding to each page in the 16384-bit

main memory area.

The following 8 bytes within the EPROM Status Memory (addresses 040 to 047H) are reserved for use

by the iButton operating software TMEX. Their purpose is to indicate which memory pages are already

in use. Originally, all of these bits are unprogrammed, indicating that the device does not store any data.

As soon as data is written to any page of the device under control of TMEX, the bit inside this bitmap

corresponding to that page will be programmed to 0, marking this page as used. These bits are

application flags only and have no impact on the internal logic of the DS2505.

The next 64 bytes of the EPROM Status Memory (addresses 100H to 13FH) contain the Page Address

Redirection Bytes which indicate if one or more of the pages of data in the 16384-bit EPROM section

have been invalidated by software and redirected to the page address contained in the appropriate

redirection byte. The hardware of the DS2505 makes no decisions based on the contents of the Page

Address Redirection Bytes. These additional bytes of Status EPROM allow for the redirection of an

entire page to another page address, indicating that the data in the original page is no longer considered

relevant or valid. With EPROM technology, bits within a page can be changed from a logical 1 to a

logical 0 by programming, but cannot be changed back. Therefore, it is not possible to simply rewrite a

page if the data requires changing or updating, but with space permitting, an entire page of data can be

redirected to another page within the DS2505 by writing the one’s complement of the new page address

into the Page Address Redirection Byte that corresponds to the original (replaced) page.

This architecture allows the user’s software to make a “data patch” to the EPROM by indicating that a

particular page or pages should be replaced with those indicated in the Page Address Redirection Bytes.

To leave an authentic audit trail of data patches, it is recommended to also program the write protect bit

of the Page Address Redirection Byte, after the page redirection is programmed. Without this protection,

it is still possible to modify the Page Address Redirection Byte, making it point to a different memory

page than the true one.

If a Page Address Redirection Byte has a FFH value, the data in the main memory that corresponds to

that page is valid. If a Page Address Redirection Byte has some other hex value, the data in the page

corresponding to that redirection byte is invalid, and the valid data can now be found at the one’s

complement of the page address indicated by the hex value stored in the associated Page Address

Redirection Byte. A value of FDH in the redirection byte for page 1, for example, would indicate that the

updated data is now in page 2. The details for reading and programming the EPROM status memory

portion of the DS2505 are given in the Memory Function Commands section.

5 of 24

DS2505+T&R; Related Products

	DS2505+T&R;	DS2505/T&R	DS2505/T&R;
Description	IC EPROM 16K 1WIRE TO92-3	IC otp 16kbit to92-3	IC EPROM 16K 1WIRE TO92-3
memory type	non-volatile	-	non-volatile
memory format	EPROM	-	EPROM
technology	EPROM - OTP	-	EPROM - OTP
storage	16Kb （16K x 1）	-	16Kb （16K x 1）
interview time	15µs	-	15µs
memory interface	1-Wire®	-	1-Wire®
Operating temperature	-40°C ~ 85°C（TA）	-	-40°C ~ 85°C（TA）
Installation type	Through hole	-	Through hole
Package/casing	TO-226-3, TO-92-3 (TO-226AA) (formed lead)	-	TO-226-3, TO-92-3 (TO-226AA) (formed lead)
Supplier device packaging	TO-92-3	-	TO-92-3

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