Serial-in Parallel-out LED Driver
24ch Constant Current LED Driver IC
with 2-line Serial Interface
BD2808MUV-M
General Description
BD2808MUV-M is 24ch Constant current sink LED Driver
with a high output voltage capability.
This device is optimized for driving RGB LEDs featuring a
6bit Current DAC for each color.
8bit PWM control is integrated for each channel.
Small VQFN48MCV070 package.
.
Key Specifications
Input Voltage Range:
Output Voltage Range:
DC Output Current (per ch):
Operating Temperature Range:
3.0V to 5.5V
20V (Max)
50mA (Max)
-40°C to +105°C
Package
VQFN48MCV070
W (Typ) x D (Typ) x H (Max)
7.00mm x 7.00mm x 1.00mm
Features
AEC-Q100 Qualified
(Note 1)
2-Line Serial Control + Enable Signal
VQFN48 Package
24 channel constant current LED driver (max
50mA / channel)
Independent PWM control for each channel
6 bit current DAC for RGB
Protection features
Equipped with PWM phase shift function to reduce
EMI
(Note1: Grade 2)
VQFN48MCV070
Instrument Cluster
LED status indicators
Instrument backlighting
LED Interior illumination
VLED
(Max=20V )
CVLED
Applications
Typical Application Circuit
VCC
RXERR
OUTG7
OUTG6
OUTB7
OUTB6
OUTR7
A5
SDI
Micro-
computer
TEST2
AGND
CLK
TEST3
OE
RISET
ISET
AGND
VCC
OUTB5
OUTR2
OUTR6
A4
A3
PGND
PGND
XERR
OUTG5
OUTR5
PGN D
OUTB4
OUTG4
BD2808MUV
OUTR4
OUTB3
OUTG3
OUTR3
PGN D
OUTB2
Fuse
VCC
3.0~5.5V
CVCC
TEST1
OUTG0
OUTG1
A0
PGND
SDO
A1
A2
OUTR0
OUTR1
OUTB0
PGND
OUTB1
OUTG2
○Product
structure: Silicon monolithic integrated circuit
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© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
Figure 1. Typical Application Circuit
ROUTR0½7
ROUTG0½7
ROUTB0½7
○This
product has no designed protection against radioactive rays.
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BD2808MUV-M
Pin Configuration
36
OUTG7
OUTG6
OUTR7
OUTR6
OUTB7
OUTB6
OUTB5
PGND
PGND
XERR
25
Datasheet
Pin Descriptions
Pin No.
1
24
Pin Name
A1
A2
SDO
PGND
OUTR0
OUTG0
OUTB0
PGND
OUTR1
OUTG1
OUTB1
OUTR2
OUTG2
OUTB2
PGND
OUTR3
OUTG3
OUTB3
OUTR4
OUTG4
OUTB4
PGND
OUTR5
OUTG5
OUTB5
OUTR6
OUTG6
OUTB6
PGND
OUTR7
OUTG7
OUTB7
PGND
XERR
A3
A4
A5
SDI
TEST3
AGND
CLK
TEST2
OE
ISET
AGND
VCC
TEST1
A0
Device-address bit
Device-address bit
Serial data output
Ground
Functions
A4
A3
37
A5
SDI
TEST3
AGND
CLK
TEST2
OE
ISET
AGND
VCC
TEST1
A0
48
PGND
OUTG0
PGND
A1
A2
OUTG1
OUTB0
OUTR0
OUTR1
OUTB1
SDO
OUTR2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
OUTG5
OUTR5
PGND
OUTB4
OUTG4
OUTR4
OUTB3
OUTG3
OUTR3
PGND
OUTB2
OUTG2
13
R0 constant-current output
G0 constant-current output
B0 constant-current output
Ground
R1 constant-current output
G1 constant-current output
B1 constant-current output
R2 constant-current output
G2 constant-current output
B2 constant-current output
Ground
R3 constant-current output
G3 constant-current output
B3 constant-current output
R4 constant-current output
G4 constant-current output
B4 constant-current output
Ground
R5 constant-current output
G5 constant-current output
B5 constant-current output
R6 constant-current output
G6 constant-current output
B6 constant-current output
Ground
R7 constant-current output
G7 constant-current output
B7 constant-current output
Ground
Error output
Device-address bit
Device-address bit
Device-address MSB
Serial data input
Test terminal
Analog Ground
Serial data clock input
Test terminal
Output enable
Constant-current value setting
Analog Ground
Power supply
Test terminal
Device-address LSB
1
12
19
20
21
Figure 2. Pin Configuration
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
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BD2808MUV-M
Block Diagram
Datasheet
V
CC
VCC
TSD
1µF/10V
OSC
VLED
VREF
OUTR0
OUTG0
CLK
SDI
PWM 8bit-Log
for each Channel
Digital
Control
6bit
DAC
6bit
DAC
6bit
DAC
OUTB0
SDO
OUTR1
OUTG1
OUTB1
I/O
OE
A0
A1
A2
A3
A4
A5
・
・
・
・
OUTR6
OUTG6
OUTB6
OUTR7
XERR
OUTG7
OUTB7
TEST1
TEST2
TEST3
ISET
PGND
PGND
PGND
PGND
AGND
AGND
Figure 3. Block Diagram
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© 2015 ROHM Co., Ltd. All rights reserved.
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ISET
PGND
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PGND
BD2808MUV-M
Description of Blocks
(1) Power Supply Start-up
The rise and fall time of a power supply can be from 10us to 1s.
Allow at least 0.1ms after V
CC
exceeds V
UVLORise
UVLO before commencing communication.
Input pin voltages must not exceed VCC or LED flicker may occur at start-up.
Datasheet
VCC
Tr
VCC
VCC
min
=3.0V
T
ACSS
=min 0.1ms
Register
access
Tf
VCC
Impossible
Possible
Impossible
(2) LED Driver operation
Maximum LED current can be set by selecting the value of R
ISET
.
The following formula gives the required value of R
ISET
.
_
/
(Typ)
(3) Reset
Power on reset occurs when V
CC
voltage falls below V
UVLOFall
.
Software reset is by command. If reset occurs, all registers are cleared (set to 0)
(4) Protection function (XERR output)
When thermal shutdown, channel open, or ISET terminal short to ground are detected, the XERR terminal is pulled LOW.
All protection functions incorporate noise rejection. The XERR terminal output is low only during detection. (Latch and
intentional delay time are not provided.) These signals are also written into a register. The flag returns to “0” only when
the register is read.
The thermal shutdown operates at 175°C typically with 10°C of hysteresis, release therefore occurring at 165°C
typically. All the channels of are turned OFF automatically when thermal shut down operates.
When the R
ISET
is out of range R
ISETSHT,
a short to ground function prevents large current from flowing into the LEDs.
All channels of LED driver are turned OFF automatically.
A Channel OPEN is detected when V
LED
< V
LOD.
The individual channel is turned OFF automatically and V
LED
becomes high impedance.
OPEN detection is not active if Brightness is set to 0.
The Error flag output pin (XERR pin) is in the same period with the OUT** pin and outputs a flag.
The flag stored in register retains the state once detected and is not changed until register is read.
V
OUT*
V
XERR
Register
(LEDOPEN)
It returns to "0" when the register is read.
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BD2808MUV-M
Description of Blocks – Continued
(5) LED Current ON/OFF Function by External Pin (OE terminal)
All channels can be controlled by the external pin. If OE pin is HIGH, the LED drivers are active.
The internal PWM control circuit becomes asynchronous.
(6) Unused Pins
Set up the test terminals and the unused terminals as follows.
Pin Name
OUT**
SDO
XERR
OE
TESTx
Connection
Short to GND
Reason
Datasheet
To avoid uncertain/unfixed state.
(Brightness setting of unused channel should be set
to zero.)
CMOS output terminal
Open drain output terminal.
When XERR is shorted to GND, noise is avoided.
Voltage clamp is necessary for CMOS input terminal.
When OE is set to “LOW”, LED current is OFF.
To avoid test mode functionality.
Open
Open or
Short to GND
Short to VCC
Short to GND
(7) LED Current Waveform
To reduce EMI, the on-timing and off-timing of LED are shifted in 8 groups and simultaneous ON or OFF are avoided.
The rise t
r
and t
f
fall time of the output current is also limited to further reduce EMI noise.
OUTR0
OUTG0
OUTB0
OUTR1
OUTG1
OUTB1
t
r
t
f
1/8 × 4ms
1/8 × 4ms
OUTR7
OUTG7
OUTB7
Figure 4. PWM phase-shift (8 groups)
(8) Diming function (PWM and DAC diming)
This IC has 2 diming functions which are PWM and DAC.
It is possible to set independent PWM control for each channel.
DAC diming is made 3 groups(R: Red, G: Green, B: Blue).
There are these detail at page 18, 19.
(9) Others(VREF and OSC)
There are VREF and OSC block for reference voltage and moving digital block.
(10) Test Processing
Test 1-3 are pins that are used for testing.
These pins are not used in normal operations, therefore connect it to ground.
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