CLRC663
High performance multi-protocol NFC frontend CLRC663 and
CLRC663
plus
Rev. 5.0 — 27 November 2020
171150
Product data sheet
COMPANY PUBLIC
1
General description
CLRC663, the high performance multi-protocol NFC frontend.
The CLRC663 multi-protocol NFC frontend IC supports the following operating modes
•
Read/write mode supporting ISO/IEC 14443 type A and MIFARE Classic
communication mode
•
Read/write mode supporting ISO/IEC 14443B
1
•
Read/write mode supporting JIS X 6319-4 (comparable with FeliCa)
•
Passive initiator mode according to ISO/IEC 18092
•
Read/write mode supporting ISO/IEC 15693
•
Read/write mode supporting ICODE EPC UID/ EPC OTP
•
Read/write mode supporting ISO/IEC 18000-3 mode 3/ EPC Class-1 HF
The CLRC663’s internal transmitter is able to drive a reader/writer antenna designed
to communicate with ISO/IEC 14443A and MIFARE Classic IC-based cards and
transponders without additional active circuitry. The digital module manages the complete
ISO/IEC 14443A framing and error detection functionality (parity and CRC).
The CLRC663 supports MIFARE Classic with 1 kB memory, MIFARE Classic with 4 kB
memory, MIFARE Ultralight, MIFARE Ultralight C, MIFARE Plus and MIFARE DESFire
products. The CLRC663 supports higher transfer speeds of the MIFARE product family
up to 848 kbit/s in both directions.
The CLRC663 supports layer 2 and 3 of the ISO/IEC 14443B reader/writer
communication scheme except anticollision. The anticollision needs to be implemented in
the firmware of the host controller as well as in the upper layers.
The CLRC663 is able to demodulate and decode FeliCa coded signals. The FeliCa
receiver part provides the demodulation and decoding circuitry for FeliCa coded signals.
The CLRC663 handles the FeliCa framing and error detection such as CRC. The
CLRC663 supports FeliCa higher transfer speeds of up to 424 kbit/s in both directions.
The CLRC663 is supporting the P2P passive initiator mode in accordance with ISO/IEC
18092.
The CLRC663 supports the vicinity protocol according to ISO/IEC15693, EPC UID and
ISO/IEC 18000-3 mode 3/ EPC Class-1 HF.
The following host interfaces are supported:
•
Serial Peripheral Interface (SPI)
•
Serial UART (similar to RS232 with voltage levels dependent on pin voltage supply)
2
•
I C-bus interface (two versions are implemented: I2C and I2CL)
The CLRC663 supports the connection of a secure access module (SAM). A dedicated
separate I2C interface is implemented for a connection of the SAM. The SAM can be
1
In the following, the word FeliCa is used for JIS X 6319-4
NXP Semiconductors
High performance multi-protocol NFC frontend CLRC663 and CLRC663
plus
used for high secure key storage and acts as a very performant crypto-coprocessor. A
dedicated SAM is available for connection to the CLRC663.
In this document, the term „MIFARE Classic card“ refers to a MIFARE Classic IC-based
contactless card.
CLRC663
CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.0 — 27 November 2020
171150
2 / 183
NXP Semiconductors
High performance multi-protocol NFC frontend CLRC663 and CLRC663
plus
CLRC663
2
Features and benefits
•
Includes NXP ISO/IEC14443-A and Innovatron ISO/IEC14443-B intellectual property
licensing rights
•
High performance multi-protocol NFC frontend for transfer speed up to 848 kbit/s
•
Supports ISO/IEC 14443 type A, MIFARE Classic, ISO/IEC 14443 B and FeliCa reader
modes
•
P2P passive initiator mode in accordance with ISO/IEC 18092
•
Supports ISO/IEC15693, ICODE EPC UID and ISO/IEC 18000-3 mode 3/ EPC Class-1
HF
•
Supports MIFARE Classic product encryption by hardware in read/write mode
Allows reading cards based on MIFARE Ultralight, MIFARE Classic with 1 kB memory,
MIFARE Classic with 4 kB memory, MIFARE DESFire EV1, MIFARE DESFire EV2 and
MIFARE Plus ICs
•
Low-Power Card Detection
•
Compliance to EMV contactless protocol specification on RF level can be achieved
•
Supported host interfaces:
–
SPI up to 10 Mbit/s
2
–
I C-bus interfaces up to 400 kBd in Fast mode, up to 1000 kBd in Fast mode plus
–
RS232 Serial UART up to 1228.8 kBd, with voltage levels dependent on pin voltage
supply
2
•
Separate I C-bus interface for connection of a secure access module (SAM)
•
FIFO buffer with size of 512 bytes for highest transaction performance
•
Flexible and efficient power-saving modes including hard power down, standby and
low-power card detection
•
Cost saving by integrated PLL to derive system clock from 27.12 MHz RF quartz crystal
•
3.0 V to 5.5 V power supply (CLRC66301, CLRC66302)
2.5 V to 5.5 V power supply (CLRC66303)
•
Up to 8 free programmable input/output pins
•
Typical operating distance in read/write mode for communication to a ISO/IEC 14443
type A and MIFARE Classic card up to 12 cm, depending on the antenna size and
tuning
•
Two package options are available for the CLRC66303:
1. HVQFN32: Package with wettable flanks easing the soldering process and quality
control of soldered parts
2. VFBGA36: Smallest package with optimized pin configuration for simple PCB layout
•
The version CLRC66303 offers a more flexible configuration for Low-Power Card
detection compared to the CLRC66301 and CLRC66302 with the new register
LPCD_OPTIONS. In addition, the CLRC66303 offers new additional settings for the
Load Protocol which fit very well to smaller antennas. The CLRC66303 is therefore the
recommended version for new designs.
CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.0 — 27 November 2020
171150
3 / 183
NXP Semiconductors
High performance multi-protocol NFC frontend CLRC663 and CLRC663
plus
CLRC663
3
Applications
•
Industrial
•
Access control
•
Gaming
CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.0 — 27 November 2020
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4 / 183
NXP Semiconductors
High performance multi-protocol NFC frontend CLRC663 and CLRC663
plus
CLRC663
4
Quick reference data
Parameter
supply voltage
PVDD supply voltage
TVDD supply voltage
power-down current
supply current
TVDD supply current
operating ambient temperature
storage temperature
no supply voltage applied
PDOWN pin pulled HIGH
[2]
[1]
Table 1. Quick reference data CLRC66301 and CLRC66302
Symbol
V
DD
V
DD(PVDD)
V
DD(TVDD)
I
pd
I
DD
I
DD(TVDD)
T
amb
T
stg
[1]
[2]
Conditions
Min
3.0
3.0
3.0
-
-
-
-25
-55
Typ
5.0
5.0
5.0
8
17
100
+25
+25
Max
5.5
V
DD
5.5
40
20
250
+85
+125
Unit
V
V
V
nA
mA
mA
°C
°C
VDD(PVDD) must always be the same or lower voltage than VDD.
I
pd
is the sum of all supply currents
Table 2. Quick reference data CLRC66303
Symbol
V
DD
V
DD(PVDD)
V
DD(TVDD)
I
pd
I
DD
I
DD(TVDD)
T
amb
Parameter
supply voltage
PVDD supply voltage
TVDD supply voltage
power-down current
supply current
TVDD supply current
recommended operation
absolute limiting value
operating ambient temperature device mounted on PCB which
allows sufficient heat dissipation for
the actual power dissipation of the
device
storage temperature
no supply voltage applied
PDOWN pin pulled HIGH
[2]
[1]
Conditions
Min
2.5
2.5
2.5
-
-
-
-
-40
Typ
5.0
5.0
5.0
8
17
180
-
+25
Max
5.5
V
DD
5.5
40
20
350
500
+105
Unit
V
V
V
nA
mA
mA
mA
°C
T
stg
[1]
[2]
-55
+25
+125
°C
VDD(PVDD) must always be the same or lower voltage than VDD.
I
pd
is the sum of all supply currents
CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 5.0 — 27 November 2020
171150
5 / 183
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