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name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will
offer these products to new and existing customers with the series name, product name, and
ordering part number with the prefix “CY”.
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About Cypress
Cypress is the leader in advanced embedded system solutions for the world's most innovative
automotive, industrial, smart home appliances, consumer electronics and medical products.
Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable,
high-performance memories help engineers design differentiated products and get them to market
first. Cypress is committed to providing customers with the best support and development
resources on the planet enabling them to disrupt markets by creating new product categories in
record time. To learn more, go to
www.cypress.com.
PRELIMINARY
MB95F856K, MB95F866K,
MB95F876K
New 8FX MB95850K/860K/870K Series
Datasheet
Description
The MB95850K/860K/870K Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction
set, the microcontrollers of these series contain a variety of peripheral functions.
Features
■
F
2
MC-8FX CPU core
■
❐
Built-in wake-up function
Instruction set optimized for controllers
❐
Multiplication and division instructions
❐
16-bit arithmetic operations
❐
Bit test branch instructions
❐
Bit manipulation instructions, etc.
■
Clock
❐
Selectable main clock source
• Main oscillation clock (up to 16.25 MHz, maximum ma-
chine clock frequency: 8.125 MHz)
• External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
• Main CR clock (4 MHz
2%)
• Main CR PLL clock
The main CR PLL clock frequency becomes 8 MHz
2%
when the PLL multiplication rate is 2.
The main CR PLL clock frequency becomes 10 MHz
2%
when the PLL multiplication rate is 2.5.
The main CR PLL clock frequency becomes 12 MHz
2%
when the PLL multiplication rate is 3.
The main CR PLL clock frequency becomes 16 MHz
2%
when the PLL multiplication rate is 4.
Selectable subclock source
• Suboscillation clock (32.768 kHz)
• External clock (32.768 kHz)
• Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
External interrupt
❐
MB95F856K: 6 channels
❐
MB95F866K: 8 channels
❐
MB95F876K: 10 channels
❐
Interrupt by edge detection (rising edge, falling edge, and
both edges can be selected)
❐
Can be used to wake up the device from different low power
consumption (standby) modes
8/10-bit A/D converter
❐
MB95F856K: 4 channels
❐
MB95F866K: 6 channels
❐
MB95F876K: 8 channels
❐
8-bit or 10-bit resolution can be selected.
Low power consumption (standby) modes
■
■
There are four standby modes as follows:
❐
Stop mode
❐
Sleep mode
❐
Watch mode
❐
Time-base timer mode
In standby mode, two further options can be selected: normal
standby mode and deep standby mode.
■
❐
■
Timer
❐
8/16-bit composite timer
• MB95F856K: 1 channel
• MB95F866K/F876K: 2 channels
❐
8/16-bit PPG
• MB95F856K: 1 channel
• MB95F866K: 2 channels
• MB95F876K: 3 channels
❐
Time-base timer
1 channel
❐
Watch counter
1 channel
❐
Watch prescaler
1 channel
UART/SIO
1 channel
❐
Full duplex double buffer
❐
Capable of clock asynchronous (UART) serial data transfer
and clock synchronous (SIO) serial data transfer
I
2
C bus interface
1 channel
I/O port
❐
MB95F856K (number of I/O ports: 21)
• General-purpose I/O ports (CMOS I/O): 17
• General-purpose I/O ports (N-ch open drain): 4
❐
MB95F866K (number of I/O ports: 29)
• General-purpose I/O ports (CMOS I/O): 25
• General-purpose I/O ports (N-ch open drain): 4
❐
MB95F876K (number of I/O ports: 45)
• General-purpose I/O ports (CMOS I/O): 41
• General-purpose I/O ports (N-ch open drain): 4
On-chip debug
❐
1-wire serial control
❐
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
❐
Built-in hardware watchdog timer
❐
Built-in software watchdog timer
Power-on reset
❐
A power-on reset is generated when the power is switched
on.
Low-voltage detection (LVD) reset circuit
■
■
■
■
■
■
Cypress Semiconductor Corporation
Document Number: 002-09305 Rev. *C
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised January
22,
2018
PRELIMINARY
MB95F856K, MB95F866K,
MB95F876K
❐
Built-in low-voltage detection function (The combination of
detection voltage and release voltage can be selected from
four options.)
■
Flash memory security function
❐
Protects the content of the Flash memory.
Touch sensor (TS)
❐
Adjacent Pattern Interference Suppression (APIS™)
❐
Three modes in APIS: APIS mode 1, APIS mode 2 and APIS
mode 3
❐
Configurable Automatic Impedance Calibration (AIC™)
❐
Direct output (DIO) function
Note:
APIS and AIC are registered trademarks of ATLab, Inc.,
South Korea.
Beep output unit
1 channel
■
Comparator
1 channel
❐
Built-in dedicated BGR
❐
The comparator reference voltage can be selected between
the BGR voltage and the comparator pin.
Clock supervisor counter
❐
Built-in clock supervisor counter
Dual operation Flash memory
❐
The program/erase operation and the read operation can be
executed in different banks (upper bank/lower bank) simul-
taneously.
■
■
■
■
Document Number: 002-09305 Rev. *C
Page 2 of 172
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