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74LVT08PW/AUJ

Description
Logic gate 3.3 V Quad 2-input AND gate
Categorysemiconductor    Logic integrated circuit    Logic gate   
File Size186KB,14 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
Download Datasheet Parametric View All

74LVT08PW/AUJ Overview

Logic gate 3.3 V Quad 2-input AND gate

74LVT08PW/AUJ Parametric

Parameter NameAttribute value
MakerNexperia
Product Categorylogic gate
productSingle-Function Gate
logic functionAND
logic series74LVT
Number of gates4 Gate
Enter the number of lines8 Input
Number of output lines4 Output
propagation delay time3.4 ns
Supply voltage - max.3.6 V
Supply voltage - min.2.7 V
Minimum operating temperature- 40 C
Maximum operating temperature+ 85 C
Installation styleSMD/SMT
Package/boxTSSOP-14
EncapsulationReel
range of working temperature- 40 C to + 85 C
Output current- 50 mA
The output voltage7 V
Factory packaging quantity2500
unit weight140.300 mg
74LVT08
3.3 V Quad 2-input AND gate
Rev. 3 — 22 March 2017
Product data sheet
1
General description
The 74LVT08 is a high-performance BiCMOS product designed for V
CC
operation at
3.3 V.
The 74LVT08 is a quad 2-input AND gate.
2
Features and benefits
Wide supply voltage range from 2.7 V to 3.6 V
Output capability: +64 mA and -32 mA
TTL input and output switching levels
Latch-up protection
JESD78 Class II exceeds 500 mA
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to 85 °C
3
Ordering information
Package
Temperature
range
-40 °C to +85 °C
-40 °C to +85 °C
-40 °C to +85 °C
Table 1. Ordering information
Type
number
74LVT08D
74LVT08DB
74LVT08PW
Name
SO14
SSOP14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT337-1
SOT402-1

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