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dsPIC33EP128GM310T-I/PF

Description
IC,DSP,16-BIT,CMOS,TQFP,100PIN,PLASTIC
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size4MB,543 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Parametric View All

dsPIC33EP128GM310T-I/PF Overview

IC,DSP,16-BIT,CMOS,TQFP,100PIN,PLASTIC

dsPIC33EP128GM310T-I/PF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid1809332083
package instructionTQFP-100
Reach Compliance Codecompliant
Country Of OriginThailand
ECCN code3A991.A.2
YTEOL7.18
Address bus width
barrel shifterYES
bit size16
boundary scanYES
maximum clock frequency60 MHz
External data bus width
FormatFIXED POINT
Integrated cacheNO
Internal bus architectureMULTIPLE
JESD-30 codeS-PQFP-G100
JESD-609 codee3
length14 mm
low power modeYES
Humidity sensitivity level3
Number of DMA channels4
Number of external interrupt devices5
Number of serial I/Os4
Number of terminals100
Number of timers13
On-chip data RAM width8
On-chip program ROM width8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTFQFP
Encapsulate equivalent codeTQFP100,.63SQ
Package shapeSQUARE
Package formFLATPACK, THIN PROFILE, FINE PITCH
power supply3.3 V
Certification statusNot Qualified
RAM (number of words)16384
ROM programmabilityFLASH
Filter levelTS 16949
Maximum seat height1.2 mm
Maximum slew rate60 mA
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
width14 mm
uPs/uCs/peripheral integrated circuit typeDIGITAL SIGNAL PROCESSOR, CONTROLLER
dsPIC33EPXXXGM3XX/6XX/7XX
16-Bit Digital Signal Controllers with High-Speed PWM,
Op Amps and Advanced Analog Features
Operating Conditions
• 3.0V to 3.6V, -40°C to +85°C, up to 70 MIPS
• 3.0V to 3.6V, -40°C to +125°C, up to 60 MIPS
Timers/Output Compare/Input Capture
• 21 General Purpose Timers:
- Nine 16-bit and up to four 32-bit timers/counters
- Eight output capture modules configurable as
timers/counters
- PTG module with two configurable timers/counters
- Two 32-bit Quadrature Encoder Interface (QEI)
modules configurable as a timer/counter
• Eight Input Capture modules
• Peripheral Pin Select (PPS) to allow Function Remap
• Peripheral Trigger Generator (PTG) for Scheduling
Complex Sequences
Core: 16-Bit dsPIC33E CPU
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL plus Hardware Divide
32-Bit Multiply Support
Clock Management
Internal Fast FRC Oscillator with 1% Accuracy
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Communication Interfaces
• Four Enhanced Addressable UART modules
(17.5 Mbps):
- With support for LIN/J2602 protocols and IrDA
®
• Three 3-Wire/4-Wire SPI modules (15 Mbps)
• 25 Mbps Data Rate for Dedicated SPI module
(with no PPS)
• Two I
2
C™ modules (up to 1 Mbps) with SMBus Support
• Two CAN modules (1 Mbps) with CAN 2.0B Support
• Programmable Cyclic Redundancy Check (CRC)
• Codec Interface module (DCI) with I
2
S Support
Power Management
Low-Power Management modes (Sleep, Idle, Doze)
Executing Optimized
NOP
String with Flash Fetch
Integrated Power-on Reset and Brown-out Reset
0.6 mA/MHz Dynamic Current (typical)
30 µA I
PD
Current (typical)
High-Speed PWM
• Up to 12 PWM Outputs (six generators)
• Primary Master Time Base Inputs allow Time Base
Synchronization from Internal/External Sources
• Dead Time for Rising and Falling Edges
• 7.14 ns PWM Resolution
• PWM Support for:
- DC/DC, AC/DC, Inverters, PFC, Lighting
- BLDC, PMSM, ACIM, SRM
• Programmable Fault Inputs
• Flexible Trigger Configurations for ADC Conversions
• Supports PWM Lock, PWM Output Chopping and
Dynamic Phase Shifting
Direct Memory Access (DMA)
• 4-Channel DMA with User-Selectable Priority Arbitration
• Peripherals Supported by the DMA Controller include:
- UART, SPI, ADC, CAN and input capture
- Output compare and timers
Input/Output
• Sink/Source 15 mA or 10 mA, Pin-Specific for
Standard V
OH
/V
OL
• 5V Tolerant Pins
• Selectable Open-Drain, Pull-ups and Pull-Downs
• Up to 5 mA Overvoltage Clamp Current
• Change Notice Interrupts on All I/O Pins
• PPS to allow Function Remap
Advanced Analog Features
• Two Independent ADC modules:
- Configurable as 10-bit, 1.1 Msps with
four S&H or 12-bit, 500 ksps with one S&H
- 11, 13, 18, 30 or 49 analog inputs
• Flexible and Independent ADC Trigger Sources
• Up to Four Op Amp/Comparators with Direct
Connection to the ADC module:
- Additional dedicated comparator
- Programmable references with 32 voltage points
- Programmable blanking and filtering
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement
Qualification and Class B Support
• AEC-Q100 REVG (Grade 1, -40°C to +125°C) Planned
• AEC-Q100 REVG (Grade 0, -40°C to +150°C) Planned
• Class B Safety Library, IEC 60730
Debugger Development Support
In-Circuit and In-Application Programming
Three Complex and Five Simple Breakpoints
IEEE 1149.2 Compatible (JTAG) Boundary Scan
Trace and Run-Time Watch
2013-2014 Microchip Technology Inc.
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