34VL02
2K I
2
C
™
Serial EEPROM Software Write-Protect
Features:
• Permanent and Resettable Software Write-Protect
for Lower Half of the Array (00h-7Fh)
• Single Supply with Operation Down to 1.5V
• Low-Power CMOS Technology:
- Read current 1 mA, typical
- Standby current, 100 nA, typical
• 2-Wire Serial Interface Bus, I
2
C™ Compatible
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Compatibility
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 16-Byte Page Write Buffer
• ESD Protection > 4,000V
• Hardware Write Protection for Entire Array
• More than 1 Million Erase/Write Cycles
• Data Retention > 200 Years
• 8-Lead PDIP, SOIC, TSSOP, MSOP and TDFN
packages
• 6-Lead SOT-23 Package
• Pb-free and RoHS Compliant
• Temperature Range:
- -20°C to +85°C
Package Types
PDIP/SOIC/TSSOP/MSOP/TDFN
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0 1
A1 2
A2 3
V
SS
4
8 V
CC
7 WP
6 SCL
5 SDA
SOT-23
SCL
V
SS
SDA
1
2
3
6 V
CC
5
A0
4 A1
Description:
The Microchip Technology Inc. 34VL02 is a 2 Kbit
Electrically Erasable PROM capable of operation
across a broad voltage range (1.5V to 3.6V). This
device has two software write-protect features for the
lower half of the array, as well as an external pin that
can be used to write-protect the entire array. This
allows the system designer to protect none, half, or all
of the array, depending on the application. The device
is organized as one block of 256 x 8-bit memory with a
2-wire serial interface. Low-voltage design permits
operation down to 1.5V, with standby and active cur-
rents of only 100 nA and 1 mA, respectively. The
34VL02 also has a page write capability for up to 16
bytes of data. The 34VL02 is available in the standard
8-pin PDIP, surface mount SOIC, TSSOP, MSOP and
TDFN packages. The 34VL02 is also available in the
6-lead, SOT-23 package.
Device Selection Table
Part Number
34VL02
Note 1:
V
CC
Range
1.5-3.6
100 kHz for V
CC
<1.8V
Max. Clock
Frequency
400 kHz
(1)
©
2008 Microchip Technology Inc.
DS22079A-page 1
34VL02
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
..........................................................................................................-0.3V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied..................................................................................................-20°C to +85°C
ESD protection on all pins
......................................................................................................................................................≥
4 kV
† NOTICE:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other conditions above
those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC SPECIFICATIONS
V
CC
= +1.5V to +3.6V
Temperature Range:
-20°C to +85°C
Min.
—
0.7 V
CC
—
0.05 V
CC
—
7
V
CC
+ 4.8
—
—
—
—
—
Standby current
—
Typ.
—
—
—
—
—
—
—
—
—
—
0.1
0.05
0.01
Max.
—
—
0.3 V
CC
—
0.40
10
10
±1
±1
10
3
1
1
Units
—
V
V
V
V
V
V
μA
μA
pF
mA
mA
μA
—
—
0.2 V
CC
for V
CC
< 2.5V
(Note)
I
OL
= 3.0 mA, V
CC
= 2.5V
A0 Pin only, V
CC
< 2.2V
A0 Pin only, V
CC
≥
2.2V
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 3.6V
(Note)
T
A
= 25°C
V
CC
= 3.6V
—
SDA = SCL = V
CC
A0, A1, A2, WP = V
SS
Conditions
DC CHARACTERISTICS
Param.
Symbol
No.
—
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
Note:
V
IH
V
IL
V
HYS
V
OL
V
HV
I
LI
I
LO
C
IN
,
C
OUT
I
CC
read
I
CCS
Characteristic
A0, A1, A2, SCL, SDA
and WP pins
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs
Low-level output voltage
High-Voltage Detect
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
I
CC
write Operating current
This parameter is periodically sampled and not 100% tested.
©
2008 Microchip Technology Inc.
DS22079A-page 3
34VL02
TABLE 1-2:
AC SPECIFICATIONS
V
CC
= +1.5V to +3.6V
Temperature Range: -20°C to +85°C
Characteristic
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
(Note 1)
SDA and SCL fall time
(Note 1)
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
WP setup time
WP hold time
Output valid from clock
(Note 2)
Bus free time: Time the bus must be
free before a new transmission can
start
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or page)
Endurance
Min.
—
—
4000
600
4700
1300
—
—
—
—
4000
600
4700
600
0
250
100
4000
600
4000
600
4700
600
—
—
1300
4700
—
—
1M
Max.
100
400
—
—
—
—
1000
300
1000
300
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
900
—
—
50
5
—
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
(Note 2)
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
1.5V
≤
V
CC
<
1.8V
1.8V
≤
V
CC
≤
3.6V
(Note 1 and Note 3)
—
25°C, V
CC
= 3.6V, Block mode
(Note 4)
AC CHARACTERISTICS
Param.
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Symbol
F
CLK
T
HIGH
T
LOW
T
R
T
F
T
HD
:
STA
T
SU
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
SU
:
WP
T
HD
:
WP
T
AA
T
BUF
16
17
18
Note
1:
2:
3:
4:
T
SP
T
WC
—
ns
ms
cycles
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the
falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved noise spike suppres-
sion. This eliminates the need for a T
I
specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult
the Total Endurance™ Model which can be obtained from Microchip’s web site at www.microchip.com.
DS22079A-page 4
©
2008 Microchip Technology Inc.
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