EMD3D256M08G1-150CBS1R datasheet, PDF

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EMD3D256M08G1-150CBS1R: DescriptionDynamic Random Access Memory 256Mb 1.5V 32Mx8 STT-MRAM; Categorysemiconductor Memory IC Dynamic random access memory; File Size2MB，39 Pages; ManufacturerEverspin Technologies; Environmental Compliance

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EMD3D256M08G1-150CBS1R Overview

Dynamic Random Access Memory 256Mb 1.5V 32Mx8 STT-MRAM

EMD3D256M08G1-150CBS1R Parametric

Parameter Name	Attribute value
Maker	Everspin Technologies
Product Category	dynamic random access memory
type	SDRAM - DDR3
Data bus width	8 bit
organize	32 M x 8
Package/box	BGA-78
storage	256 Mbit
maximum clock frequency	667 MHz
Supply voltage - max.	1.575 V
Supply voltage - min.	1.425 V
Supply current—max.	220 mA
Minimum operating temperature	0 C
Maximum operating temperature	+ 85 C
series	EMD3D256M
Encapsulation	Reel
Installation style	SMD/SMT
Factory packaging quantity	2000

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EMD3D256M08BS1

EMD3D256M16BS1

FEATURES

256Mb ST-DDR3 Spin-transfer Torque

MRAM

•

Non-volatile 256Mb (32Mb x 8, 16Mb x 16) DDR3

Supports standard DDR3 SDRAM features

= 1.5v +/- 0.075v

Up to 667MHz

CK (1333MT/sec/pin)

Page size of 512 bits (x8) or 1024 bits (x16)

On-device termination

RoHS

On-Chip DLL aligns DQ, DQS, DQS transition with CK transition

All addresses and control inputs are latched on rising edge of Clock

Burst length of 8 with programmable Burst Chop length of 4

Standard 10x13mm 78-Ball (x8) or 96-ball (x16) BGA Package

INTRODUCTION

The EMD3D256M08/16B 256Mb DDR3 Spin-transfer Torque MRAM (STT-MRAM) is a non-

volatile memory that offers non-volatility and high endurance at DDR3 speeds. The device is

capable of DDR3 operation at rates of up to 1333MT/Sec/Pin. It is designed to comply with

all DDR3 DRAM features including on-device termination (ODT) and internal ZQ calibration

but with the benefit of data persistence and extremely high write cycle endurance. With

Spin-Torque MRAM technology, cell refresh is not required, which greatly simplifies system

design and reduces overhead.

All control and address inputs are synchronized with a pair of externally supplied differential

clocks, with input latching at clock crosspoints. I/Os are synchronized with a pair of bidirec-

tional strobes (DQS, DQS). The device uses a RAS/CAS multiplexing scheme and operates at

1.5V.

EMD3D256M08BS1/16BS1 Revision 1.3 10/2018

EMD3D256M08BS1

EMD3D256M16BS1

TABLE OF CONTENTS

DDR3 DRAM COMPATIBILITY .............................................................................................................2

FUNCTIONAL DESCRIPTION ...............................................................................................................6

Basic Functionality ..........................................................................................................................6

Figure 1 – Simplified State Diagram STT-MRAM ............................................................................................... 7

Figure 2 – Block Diagram (32Mb x 8) STT-MRAM .............................................................................................. 8

Figure 3 – Block Diagram (16Mb x 16) STT-MRAM ........................................................................................... 8

Table 1 – Addressing Scheme by I/O Width ........................................................................................................ 9

PACKAGE BALL ASSIGNMENTS ....................................................................................................... 10

Table 2 – 32Mb x 8 in 78-Ball BGA - Top View ...................................................................................................10

Table 3 – 16Mb x 16 in 96-Ball BGA - Top View.................................................................................................11

BALL FUNCTIONS AND DESCRIPTIONS .......................................................................................... 12

Table 4 – Ball Functions and Descriptions .........................................................................................................12

ABSOLUTE MAXIMUM RATINGS ...................................................................................................... 15

Table 5 – Absolute Maximum Ratings.................................................................................................................15

THERMAL CHARACTERISTICS.......................................................................................................... 16

Table 6 – Thermal Characteristics 78-ball BGA Package ...............................................................................16

Table 7 – Thermal Characteristics 96-ball BGA Package ...............................................................................16

DC CHARACTERISTICS ...................................................................................................................... 17

Table 8 – Power Supply and Input Leakage .....................................................................................................17

Table 9 – Input / Output Capacitance .................................................................................................................18

Table 10 – I

Maximum Limits ............................................................................................................................19

TIMING PARAMETERS ...................................................................................................................... 20

Table 11 – Timing Parameters ................................................................................................................................20

TRUTH TABLES................................................................................................................................... 21

Command Truth Table .................................................................................................................. 21

EMD3D256M08BS1/16BS1 Revision 1.3 10/2018

EMD3D256M08BS1

EMD3D256M16BS1

Table of Contents (Cont’d)

Table 12 – Command Truth Table .........................................................................................................................21

CKE Truth Table ............................................................................................................................. 23

Table 13 – CKE Truth Table.......................................................................................................................................23

FUNCTIONAL PARAMETERS ............................................................................................................ 24

COMMAND DESCRIPTIONS .............................................................................................................. 25

ACTIVE Command......................................................................................................................... 25

Figure 4 – ACTIVE Command Example: Meeting

RRD (MIN) and

RCD (MIN)......................................26

PRECHARGE Command ................................................................................................................ 26

Figure 5 – PRECHARGE Command Timing ........................................................................................................26

READ Command ........................................................................................................................... 27

Figure 6 – READ Command Timing ......................................................................................................................27

WRITE Command .......................................................................................................................... 28

Figure 7 – WRITE Burst Operation WL = 5 (AL = 0 CWL = 5, BL8) ...............................................................29

Burst Length, Type and Order ..................................................................................................... 30

Table 14 – Burst Length, Type and Order ...........................................................................................................30

PART NUMBER DECODER ................................................................................................................. 31

Table 15 – 256Mb x8 / x16 STT-MRAM Ordering Part Number Decoder ...............................................31

ORDERING PART NUMBERS ............................................................................................................. 32

Table 16 – Ordering Part Numbers .......................................................................................................................32

EMD3D256M08BS1/16BS1 Revision 1.3 10/2018

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