GLS37VF010 / GLS37VF020 / GLS37VF040
GLS37VF512 / 010 / 020 / 0402.7V-Read 512Kb / 1Mb / 2Mb / 4Mb (x8) MTP flash memories
1 Mbit / 2 Mbit / 4 Mbitsn(x8)
Many-Time Programmable Flash
Data Sheet
FEATURES:
• Organized as 128K x8 / 256K x8 / 512K x8
• 2.7-3.6V Read Operation
• Superior Reliability
– Endurance: At least 1000 Cycles
– Greater than 100 years Data Retention
• Low Power Consumption:
– Active Current: 10 mA (typical)
– Standby Current: 2 µA (typical)
• Fast Read Access Time:
– 70 ns
• Latched Address and Data
• Fast Byte-Program Operation:
– Byte-Program Time: 15 µs (typical)
– Chip Program Time:
2 seconds (typical) for GLS37VF010
4 seconds (typical) for GLS37VF020
8 seconds (typical) for GLS37VF040
• Electrical Erase Using Programmer
– Does not require UV source
– Chip-Erase Time: 100 ms (typical)
• CMOS I/O Compatibility
• JEDEC Standard Byte-wide Flash
EEPROM Pinouts
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
– 32-pin PDIP
– Non-Pb (lead-free) packages available
PRODUCT DESCRIPTION
The GLS37VF010/020/040 devices are 128K x8 / 256K x8
/ 512K x8 CMOS, Many-Time Programmable (MTP), low
cost flash, manufactured with high performance Super-
Flash technology. The split-gate cell design and thick-oxide
tunneling injector attain better reliability and manufacturabil-
ity compared with alternate approaches. The
GLS37VF010/020/040 can be electrically erased and pro-
grammed at least 1000 times using an external program-
mer, e.g., to change the contents of devices in inventory.
The GLS37VF010/020/040 have to be erased prior to pro-
gramming. These devices conform to JEDEC standard
pinouts for byte-wide flash memories.
Featuring high performance Byte-Program, the
GLS37VF010/020/040 provide a typical Byte-Program
time of 15 µs. Designed, manufactured, and tested for a
wide spectrum of applications, these devices are offered
with an endurance of at least 1000 cycles. Data retention is
rated at greater than 100 years.
The GLS37VF010/020/040 are suited for applications that
require infrequent writes and low power nonvolatile stor-
age. These devices will improve flexibility, efficiency, and
performance while matching the low cost in nonvolatile
applications that currently use UV-EPROMs, OTPs, and
mask ROMs.
To meet surface mount and conventional through hole
requirements, the GLS37VF010/020/040 are offered in 32-
lead PLCC, 32-lead TSOP, and 32-pin PDIP packages.
See Figures 2, 3, and 4 for pin assignments.
Device Operation
The GLS37VF010/020/040 devices are nonvolatile mem-
ory solutions that can be used instead of standard flash
devices if in-system programmability is not required. It is
functionally (Read) and pin compatible with industry stan-
dard flash products.The device supports electrical Erase
operation via an external programmer.
Read
The Read operation of the GLS37VF010/020/040 is con-
trolled by CE# and OE#. Both CE# and OE# have to be
low for the system to obtain data from the outputs. Once
the address is stable, the address access time is equal to
the delay from CE# to output (T
CE
). Data is available at the
output after a delay of TOE from the falling edge of OE#,
assuming the CE# pin has been low and the addresses
have been stable for at least T
CE
-T
OE.
When the CE# pin is
high, the chip is deselected and a standby current of only 2
µA (typical) is consumed. OE# is the output control and is
©2010 Greenliant Systems, Ltd.
www.greenliant.com
S71151-11-000
05/10
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
used to gate data from the output pins. The data bus is in
high impedance state when either CE# or OE# is V
IH.
Refer to Figure 5 for the timing diagram.
Product Identification Mode
The Product Identification mode identifies the devices as
GLS37VF010, GLS37VF020, and GLS37VF040 and man-
ufacturer as Greenliant. This mode may be accessed by
the hardware method. To activate this mode, the program-
ming equipment must force V
H
(11.4-12V) on address A
9
.
Two identifier bytes may then be sequenced from the
device outputs by toggling address line A
0
. For details, see
Table 3 for hardware operation.
TABLE 1: Product Identification
Address
Manufacturer’s ID
Device ID
GLS37VF010
GLS37VF020
GLS37VF040
0001H
0001H
0001H
C5H
C6H
C2H
T1.2 1151
Byte-Program Operation
The GLS37VF010/020/040 are programmed by using an
external programmer. The programming mode is activated
by asserting 11.4-12V on OE# pin and V
IL
on CE# pin. The
device is programmed using a single pulse (WE# pin low)
of 15 µs per byte. Using the MTP programming algorithm,
the Byte-Program process continues byte-by-byte until the
entire chip has been programmed. Refer to Figure 11 for
the flowchart and Figure 7 for the timing diagram.
Data
BFH
0000H
Chip-Erase Operation
The only way to change a data from a “0” to “1” is by
electrical erase that changes every bit in the device to
“1”. The GLS37VF010/020/040 use an electrical Chip-
Erase operation. The entire chip can be erased in 100
ms (WE# pin low). In order to activate erase mode, the
11.4-12V is applied to OE# and A
9
pins while CE# is
low. All other address and data pins are “don’t care”.
The falling edge of WE# will start the Chip-Erase oper-
ation. Once the chip has been erased, all bytes must
be verified for FFH. Refer to Figure 10 for the flowchart
and Figure 6 for the timing diagram.
Design Considerations
The GLS37VF010/020/040 should have a 0.1 µF ceramic
high frequency, low inductance capacitor connected
between V
DD
and GND. This capacitor should be placed
as close to the package terminals as possible.
OE# and A
9
must remain stable at V
H
for the entire dura-
tion of an Erase operation. OE# must remain stable at V
H
for the entire duration of the Program operation.
X-Decoder
SuperFlash
Memory
Memory Address
Address Buffer
Y-Decoder
CE#
OE#
A9
WE#
Control Logic
I/O Buffers
DQ7 - DQ0
1151 B1.1
FIGURE 1: Functional Block Diagram
©2010 Greenliant Systems, Ltd.
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1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
GLS37VF010 GLS37VF020 GLS37VF040
VDD
WE#
WE#
WE#
A12
A15
A16
A18
VDD
A12
A15
A16
VDD
A12
A15
A16
NC
GLS37VF040 GLS37VF020 GLS37VF010
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
GLS37VF040 GLS37VF020 GLS37VF010
4
3
2
1
32 31 30
29
28
27
26
25
24
23
22
21
NC
GLS37VF010 GLS37VF020 GLS37VF040
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
32-lead PLC
C
Top View
A17
NC
A17
1151 32-plc P02a.4
c
DQ1
DQ2
VSS
DQ3
DQ4
DQ5
DQ5
DQ5
DQ1
DQ2
VSS
DQ3
DQ4
DQ1
DQ2
VSS
DQ3
DQ4
FIGURE 2: Pin Assignments for 32-lead PLCC
GLS37VF040 GLS37VF020 GLS37VF010
A11
A9
A8
A13
A14
A17
WE#
VDD
A18
A16
A15
A12
A7
A6
A5
A4
A11
A9
A8
A13
A14
A17
WE#
VDD
NC
A16
A15
A12
A7
A6
A5
A4
A11
A9
A8
A13
A14
NC
WE#
VDD
NC
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
DQ6
DQ6
DQ6
GLS37VF010 GLS37VF020 GLS37VF040
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
1151 32-tsop P01.
Standard Pinout
Top View
FIGURE 3: Pin Assignments for 32-lead TSOP (8mm x 14mm)
©2010 Greenliant Systems, Ltd.
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1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
GLS37VF040 GLS37VF020 GLS37VF010
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
32-pin
6
PDIP
7
8
Top View
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
GLS37VF010 GLS37VF020 GLS37VF040
VDD
WE#
NC
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
1151 32-pdip P02b
.2
FIGURE 4: Pin Assignments for 32-pin PDIP
TABLE 2: Pin Description
Symbol
A
MS1
-A
0
DQ
7
-DQ
0
CE#
WE#
OE#
V
DD
V
SS
NC
Pin Name
Address Inputs
Data Input/output
Chip Enable
Write Enable
Output Enable
Power Supply
Ground
No Connection
Unconnected pins.
T2.1 1151
1. A
MS
= Most significant address
A
MS
= A
16
for GLS37VF010, A
17
for GLS37VF020, and A
18
for GLS37VF040
Functions
To provide memory addresses.
To output data during Read cycles and receive input data during Program cycles.
The outputs are in tri-state when OE# or CE# is high.
To activate the device when CE# is low.
To program or erase (WE# = V
IL
pulse during Program or Erase)
To gate the data output buffers during Read operation when low
To provide 3.0V supply (2.7-3.6V)
TABLE 3: Operation Modes Selection
Mode
Read
Output Disable
Standby
Chip-Erase
Byte-Program
Program/Erase Inhibit
Product Identification
CE#
V
IL
V
IL
V
IH
V
IL
V
IL
X
X
V
IL
WE#
V
IH
X
X
V
IL
V
IL
V
IH
X
V
IH
A
9
A
IN
X
X
V
H
A
IN
X
X
V
H
OE#
V
IL
V
IH
X
V
H
V
H
X
V
IL
or V
IH
V
IL
DQ
D
OUT
High Z
High Z
High Z
D
IN
High Z
High Z/ D
OUT
Manufacturer’s ID (BFH)
Device ID
1
Address
A
IN
A
IN
X
X
A
IN
X
X
A
MS2
- A
1
=V
IL
, A
0
=V
IL
A
MS2
- A
1
=V
IL
, A
0
=V
IH
T3.2 1151
Note:
X = V
IL
or V
IH
(or V
H
in case of OE# and A
9
)
V
H
= 11.4-12V
1. Device ID = C5H for GLS37VF020, C6H for GLS37VF020, and C2H for GLS37VF040
2. A
MS
= Most significant address
A
MS
= A
16
for GLS37VF010, A
17
for GLS37VF020, and A
18
for GLS37VF040
©2010 Greenliant Systems, Ltd.
4
S71151-11-000
05/10
1 Mbit / 2 Mbit / 4 Mbit Many-Time Programmable Flash
GLS37VF010 / GLS37VF020 / GLS37VF040
Data Sheet
Absolute Maximum Stress Ratings
(Applied conditions greater than those listed under “Absolute Maximum
Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these conditions or conditions greater than those defined in the operational sections of this data
sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0V to V
DD
+2.0V
Voltage on A
9
Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 13.2V
Package Power Dissipation Capability (T
A
= 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Through Hole Lead Soldering Temperature (10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Surface Mount Solder Reflow Temperature: . . . . . . . . . . . . . . . . . . . . . . . . . “with-Pb” units
1
: 240°C for 3 seconds
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . “non-Pb” units: 260°C for 3 seconds
Output Short Circuit Current
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
1. Certain “with-Pb” package types are capable of 260°C for 3 seconds; please consult the factory for the latest information.
2. Outputs shorted for no more than one second. No more than one output shorted at a time.
O
PERATING
R
ANGE
Range
Commercial
Ambient Temp
0°C to +70°C
V
DD
2.7-3.6V
AC C
ONDITIONS OF
T
EST
Input Rise/Fall Time . . . . . . . . . . . . . . . 5 ns
Output Load . . . . . . . . . . . . . . . . . . . . . C
L
= 100 pF
See Figures 8 and 9
TABLE 4: Read Mode DC Operating Characteristics V
DD
=2.7-3.6V
(T
A
= 0°C to +70°C (Commercial))
Limits
Symbol
I
DD
Parameter
V
DD
Read Current
12
I
SB
I
LI
I
LO
V
IL
V
IH
V
IHC
V
OL
V
OH
I
H
Standby V
DD
Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
Supervoltage Current for A
9
V
DD
-0.3
200
0.7 V
DD
V
DD
-0.3
0.2
15
1
10
0.8
mA
µA
µA
µA
V
V
V
V
V
µA
Min
Max
Units
Test Conditions
Address input=V
ILT
/V
IHT
, at f=1/T
RC
Min
V
DD
=V
DD
Max
CE#=V
IL,
OE#=V
IHT
, all I/Os open
CE#=V
IHC
, V
DD
=V
DD
Max
V
IN
=GND to V
DD
, V
DD
=V
DD
Max
V
OUT
=GND to V
DD
, V
DD
=V
DD
Max
V
DD
=V
DD
Min
V
DD
=V
DD
Max
V
DD
=V
DD
Max
I
OL
=100 µA, V
DD
=V
DD
Min
I
OH
=-100 µA, V
DD
=V
DD
Min
CE#=OE#=V
IL
, A
9
=V
H
Max
T4.6 1151
©2010 Greenliant Systems, Ltd.
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