Note: The LC75834JE do not have the S9, S18, S27 S34 output pins.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ranges
at Ta = –40 to +85°C, VSS = 0 V
Parameter
Supply voltage
Input voltage
Input high level voltage
Input low level voltage
Recommended external resistance
Recommended external capacitance
Guaranteed oscillation range
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
High level clock pulse width
Low level clock pulse width
Rise time
Fall time
INH switching time
Symbol
V
DD
V
LCD
V
LCD
1
V
LCD
2
V
IH
V
IL
R
OSC
C
OSC
f
OSC
t
ds
t
dh
t
cp
t
cs
t
ch
t
øH
t
øL
t
r
t
f
t
c
V
DD
V
LCD
V
LCD
1
V
LCD
2
CE, CL, DI, INH
CE, CL, DI, INH
OSC
OSC
OSC
CL, DI: Figure 2
CL, DI: Figure 2
CE, CL: Figure 2
CE, CL: Figure 2
CE, CL: Figure 2
CL: Figure 2
CL: Figure 2
CE, CL, DI: Figure 2
CE, CL, DI: Figure 2
INH, CE: Figure 3
10
25
160
160
160
160
160
160
160
160
160
0.8 V
DD
0
43
680
50
100
Conditions
Ratings
min
2.7
2.7
2/3 V
LCD
1/3 V
LCD
typ
max
6.0
6.0
V
LCD
V
LCD
6.0
0.2 V
DD
Unit
V
V
V
V
V
V
k
pF
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
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LC75834E, LC75834W, LC75834JE
Electrical Characteristics
for the Allowable Operating Ranges
Parameter
Hysteresis
Input high level current
Input low level current
Output high level voltage
Symbol
V
H
I
IH
I
IL
V
OH
1
V
OH
2
V
OH
3
V
OL
1
Output low level voltage
V
OL
2
V
OL
3
V
MID
1
V
MID
2
Output middle level voltage*1
V
MID
3
V
MID
4
V
MID
5
Oscillator frequency
f
OSC
I
DD
1
I
DD
2
I
LCD
1
Current drain
I
LCD
2
I
LCD
3
Conditions
CE, CL, DI, INH
CE, CL, DI, INH; V
I
= 6.0 V
CE, CL, DI, INH; V
I
= 0 V
S1 to S34; I
O
= –20
μ
A
COM1 to COM4; I
O
= –100
μA
P1 to P8; I
O
= –1 mA
S1 to S34; I
O
= 20
μ
A
COM1 to COM4; I
O
= 100
μ
A
P1 to P8; I
O
= 1 mA
COM1 to COM4; 1/2 bias,
I
O
= ±100
μA
S1 to S34; 1/3 bias,
I
O
= ±20
μA
S1 to S34; 1/3 bias,
I
O
= ±20
μA
COM1 to COM4; 1/3 bias,
I
O
= ±100
μA
COM1 to COM4; 1/3 bias,
I
O
= ±100
μA
OSC; R
OSC
= 43 k , C
OSC
= 680 pF
VDD; power saving mode
VDD; V
DD
= 6.0 V, output open, fosc = 50 k Hz
VLCD; power saving mode
VLCD; VLCD = 6.0 V, output open
1/2 bias, fosc = 50 k Hz
VLCD; VLCD = 6.0 V, output open
1/3 bias, fosc = 50 k Hz
230
1/2 V
LCD
– 0.9
2/3 V
LCD
– 0.9
1/3 V
LCD
– 0.9
2/3 V
LCD
– 0.9
1/3 V
LCD
– 0.9
40
50
–5.0
V
LCD
– 0.9
V
LCD
– 0.9
V
LCD
– 0.9
0.9
0.9
0.9
1/2 V
LCD
+ 0.9
2/3 V
LCD
+ 0.9
1/3 V
LCD
+ 0.9
2/3 V
LCD
+ 0.9
1/3 V
LCD
+ 0.9
60
5
460
5
100
60
200
120
Ratings
min
typ
0.1 VDD
5.0
max
Unit
V
μ
A
μ
A
V
V
V
V
V
V
V
V
V
V
V
kHz
μ
A
μ
A
μ
A
μA
μA
Note:
*1
Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.)
The LC75834JE do not have the S9, S18, S27, S34 output pins.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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LC75834E, 75834W, 75834JE
VLCD
VLCD1
To the common segments drivers
VLCD2
Except these resistors
VSS
Figure 1
1. When CL is stopped at the low level
VIH
CE
tøH
CL
VIH
50%
VIL
tr
DI
VIH
VIL
tds
tdh
tf
tcp
tcs
tch
tøL
VIL
2. When CL is stopped at the high level
VIH
CE
tøL
CL
tf
DI
tds
tdh
tr
VIH
VIL
tøH
VIL
VIH
50%
VIL
tcp
tcs
tch
Figure 2
Page 4
LC75834E, 75834W, 75834JE
Pin Assignments
COM2
COM1
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
COM3
COM2
COM1
S33
S32
S31
S30
S29
S28
S26
S25
S24
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
COM4
VDD
VLCD
VLCD1
VLCD2
VSS
OSC
INH
CE
CL
DI
33
34
23
22
COM3
COM4
VDD
VLCD
VLCD1
VLCD2
VSS
OSC
INH
CE
CL
DI
36
37
25
24
LC75834E
LC75834W
LC75834JE
48
1
13
12
44
1
12
11
S24
S23
S22
S21
S20
S19
S17
S16
S15
S14
S13
Block Diagram
COM4
COM3
COM2
COM1
S9
S8/P8
S2/P2
S1/P1
S34
S33
P1/S1
P2/S2
P3/S3
P4/S4
P5/S5
P6/S6
P7/S7
P8/S8
S9
S10
S11
S12
COMMON
DRIVER
INH
CLOCK
GENERATOR
SEGMENT DRIVER & LATCH
OSC
VDD
VLCD
VLCD1
VLCD2
VSS
SHIFT REGISTER
ADDRESS
DETECTOR
CL
Note: The LC75834JE do not have the S9, S18, S27, S34 output pins.
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