NHS3100
Temperature logger
Rev. 6.03 — 15 June 2018
Product data sheet
1
General description
The NHS3100 is an IC optimized for temperature monitoring and logging. It has
an embedded NFC interface, an internal temperature sensor and a direct battery
connection. These features support an effective system solution with a minimal number
of external components and a single layer foil implementation for temperature monitoring.
The NHS3100 works either battery-powered or NFC-powered.
The embedded ARM Cortex-M0+ offers flexibility to the users of this IC to implement
their own dedicated solution. The NHS3100 contains multiple features, including multiple
Power-down modes and a selectable CPU frequency of up to 8 MHz, for ultra low power
consumption.
Users can program this NHS3100 with the industry-wide standard solutions for ARM
Cortex-M0+ processors.
As of September 22, 2017, this device has been certified by the NFC forum (certification
ID: 58516).
CAUTION
Semiconductors are light sensitive. Exposure to light sources can cause the IC to
malfunction. The IC must be protected against light. The protection must be applied to all
sides of the IC.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the
ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A
or
equivalent standards.
msc896
NXP Semiconductors
Temperature logger
NHS3100
2
Features and benefits
2.1 System
•
•
•
•
•
ARM Cortex-M0+ processor running at frequencies of up to 8 MHz
ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC)
ARM Serial Wire Debug (SWD)
System tick timer
IC reset input
2.2 Memory
•
32 kB on-chip flash programming memory
•
4 kB on-chip EEPROM of which 320 bytes are write-protected
•
8 kB SRAM
2.3 Digital peripherals
•
Up to 12 General Purpose Input Output (GPIO) pins with configurable pull-up/pull-down
resistors and repeater mode
•
GPIO pins which can be used as edge and level sensitive interrupt sources
•
High-current drivers (sink only; 20 mA) on four GPIO pins
2
•
High-current drivers (sink only; 20 mA) on two I C-bus pins
•
Programmable WatchDog Timer (WDT)
2.4 Analog peripherals
•
Temperature sensor with ±0.3 °C absolute temperature accuracy between 0 °C and
40 °C and ±0.5 °C in the range −40 °C and +85 °C
2.5 Communication interfaces
•
NFC/RFID ISO 14443 type A interface; NFC forum type 2 compatible
2
2
•
I C-bus interface supporting full I C-bus specification and Fast-mode with a data rate of
400 kbit/s, with multiple-address recognitions and Monitor mode
2.6 Clock generation
•
8 MHz internal RC oscillator, trimmed to 2 % accuracy, which is used for the system
clock
•
Timer oscillator operating at 32 kHz linked to the RTC timer unit
NHS3100
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© NXP B.V. 2018. All rights reserved.
Product data sheet
Rev. 6.03 — 15 June 2018
2 / 45
NXP Semiconductors
Temperature logger
NHS3100
2.7 Power control
•
•
•
•
•
Support for 1.72 V to 3.6 V external voltages
The NHS3100 can also be powered from the NFC field.
Activation via NFC possible
Integrated Power Management Unit (PMU) for versatile control of power consumption
Four reduced power modes for ARM Cortex-M0+: Sleep, Deep-sleep, Deep power-
down and Battery-off
•
Power gating for each analog peripheral for ultra-low power operation
•
< 50 nA IC current consumption in Battery-off mode at 3.0 V
•
Power-On Reset (POR)
2.8 General
•
Unique device serial number for identification
3
Applications
•
Temperature measurement
•
Temperature logging
•
Cold chain validation
4
Ordering information
Package
Name
Description
plastic thermal enhanced very thin quad flat package; no leads;
24 terminals; body 4 × 4 × 0.85 mm
wafer level chip-scale package; 25 balls; 2.51 × 2.51 × 0.5 mm
bumped die with 8 functional bumps; 2.51 × 2.51 × 0.16 mm
Version
SOT616-3
SOT1401-1
SOT1870-1
HVQFN24
WLCSP25
bumped die
Table 1. Ordering information
Type number
NHS3100
NHS3100UK
NHS3100W8
5
Marking
Table 2. Marking codes
Type number
NHS3100
NHS3100UK
NHS3100W8
Marking code
NHS3100
NHS3100
no marking code
NHS3100
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© NXP B.V. 2018. All rights reserved.
Product data sheet
Rev. 6.03 — 15 June 2018
3 / 45
NXP Semiconductors
Temperature logger
NHS3100
6
Block diagram
The internal block diagram of the NHS3100 is shown in
Figure 1.
It consists of a Power
Management Unit (PMU), clocks, timers, a digital computation, and a control cluster
(ARM Cortex-M0+ and memories) and AHB-APB slave modules.
PADS
32 kHz FRO
WAKE-UP
TIMER
DIGITAL
SWITCH
MATRIX
8 MHz FRO
CLOCK
SHOP
EXTERNAL
POWER
SWITCH
LDO (1.2 V)
LDO (1.6 V)
INTERNAL
POWER
SWITCHES
POR
POWER
PADS
8 kB SRAM
32 kB FLASH
I
2
C-BUS
SPI
TIMERS
WATCHDOG
SYSCONFIG
GPIO
4 kB EEPROM
MFIO
(DIGITAL)
IOCONFIG
EEPROM
CONTROL
FLASH
CONTROL
PMU
ARM M0+
AHB-APB BRIDGE
I
2
C-BUS
TEMPERATURE
SENSOR
NFC/RFID
HIGH
DRIVE
aaa-015348
Figure 1. NHS3100 block diagram
NHS3100
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© NXP B.V. 2018. All rights reserved.
Product data sheet
Rev. 6.03 — 15 June 2018
4 / 45
NXP Semiconductors
Temperature logger
NHS3100
7
Pinning information
7.1 Pinning
7.1.1 HVQFN24 package
Figure 2
shows the pad layout of the NHS3100 in the HVQFN24 package.
24 (reserved)
23 (reserved)
22 (reserved)
21 (reserved)
20 LA
PIO0_4/SCL 11
PIO0_0/WAKEUP
PIO0_1/CLKOUT
PIO0_2/SSEL
PIO0_6/SCLK
PIO0_8/MISO
PIO0_9/MOSI
1
2
3
4
5
6
(reserved) 10
PIO0_5/SDA 12
7
8
9
25 VSS
19 LB
18 (reserved)
17 (reserved)
16 PIO0_11/CT32B_M1/SWDIO
15 PIO0_10/CT32B_M0/SWCLK
14 PIO0_3/CT16B_M0
13 PIO0_7/CT16B_M1
aaa-015349
terminal 1
index area
Transparent top view
Figure 2. Pad configuration HVQFN24
Table 3. Pad allocation table of the HVQFN24 package
Pad
1
2
3
4
5
6
7
8
9
10
11
12
[1]
[2]
Symbol
PIO0_0/WAKEUP
PIO0_1/CLKOUT
PIO0_2/SSEL
PIO0_6/SCLK
PIO0_8/MISO
PIO0_9/MOSI
VDDBAT
VSS
RESETN
(reserved)
PIO0_4/SCL
PIO0_5/SDA
RESETN
VDDBAT
VSS
Pad
13
14
15
16
17
18
19
20
21
22
23
24
[2]
[2]
[2]
[2]
[1]
[1]
[1]
[1]
[2]
[2]
Symbol
PIO0_7/CT16B_M1
PIO0_3/CT16B_M0
PIO0_10/CT32B_M0/SWCLK
PIO0_11/CT32B_M1/SWDIO
(reserved)
(reserved)
LB
LA
(reserved)
(reserved)
(reserved)
(reserved)
High source current pads. See
Section 8.6.3.
These pads must be tied to ground.
NHS3100
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© NXP B.V. 2018. All rights reserved.
Product data sheet
Rev. 6.03 — 15 June 2018
5 / 45
DSP and ARM Processors
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