74HC258DB,118 datasheet, PDF - EEWORLD Datasheet

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74HC258DB,118: DescriptionEncoder, Decoder, Multiplexer and Demultiplexer QUAD 2 TO 1 MUX 3-S; Categorylogic logic; File Size85KB，15 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74HC258DB,118 Overview

Encoder, Decoder, Multiplexer and Demultiplexer QUAD 2 TO 1 MUX 3-S

74HC258DB,118 Parametric

Parameter Name	Attribute value
Source Url Status Check Date	2013-06-14 00:00:00
Brand Name	NXP Semiconductor
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SSOP1
package instruction	SSOP, SSOP16,.3
Contacts	16
Manufacturer packaging code	SOT338-1
Reach Compliance Code	compliant
series	HC/UH
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	6.2 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	MULTIPLEXER
MaximumI(ol)	0.006 A
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Output times	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Encapsulate equivalent code	SSOP16,.3
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	2/6 V
Prop。Delay @ Nom-Sup	29 ns
propagation delay (tpd)	145 ns
Certification status	Not Qualified
Maximum seat height	2 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	5.3 mm

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74HC258

Quad 2-input multiplexer; 3-state; inverting

Rev. 04 — 14 April 2008

Product data sheet

1. General description

The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power

Schottky TTL (LSTTL). The 74HC258 is speciﬁed in compliance with JEDEC

standard no. 7A.

The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select

4 bits of data from two sources and is controlled by a common data select input (S).

The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data

inputs from source 1 (1I1 to 4I1) are selected when S is HIGH.

Data appears at the outputs (1Y to 4Y) in inverted form from the select inputs.

The 74HC258 is the logic implementation of a 4-pole, 2-position switch, where the position

of the switch is determined by the logic levels applied to S. The outputs are forced to a

high-impedance OFF-state when OE is HIGH.

The logic equations for the outputs are:

= OE

× (

1I1

+ 1I0

)

= OE

× (

2I1

2I0

)

= OE

× (

3I1

3I0

)

= OE

× (

4I1

4I0

)

The 74HC258 is identical to the 74HC257 but has inverting outputs.

2. Features

3-state outputs interface directly with system bus

Low-power dissipation

Inverting data path

Complies with JEDEC standard no. 7A

ESD protection:

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Multiple package options

Speciﬁed from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C.

74HC258DB,118 Related Products

	74HC258DB,118	74HC258DB112
Description	Encoder, Decoder, Multiplexer and Demultiplexer QUAD 2 TO 1 MUX 3-S	Encoders, Decoders, Multiplexers & Demultiplexers QUAD 2 TO 1 MUX 3-S

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