UBA2212
Half-bridge power IC family for CFL lamps
Rev. 3 — 27 February 2012
Product data sheet
1. General description
The UBA2212 family of integrated circuits are a range of high voltage monolithic ICs for
driving Compact Fluorescent Lamps (CFL) in half-bridge configurations. The family is
designed to provide easy integration of lamp loads across a range of burner power and
mains voltages.
2. Features and benefits
2.1 System integration
Integrated half-bridge power transistors
UBA2212C: 120 V; 2
;
3.5 A maximum ignition current
Integrated bootstrap diode
Integrated high-voltage supply
2.2 General
RMS lamp current control
2.3 Fast and smooth light out
Boost with externally controlled timing
Temperature controlled timing during boost state
Smooth transition from boost to steady state
2.4 Burner lifetime
Fixed frequency preheat with adjustable preheat time
Minimum glow time control to support cold start
Lamp power independent from mains voltage variations
Lamp inductor saturation protection during ignition
NXP Semiconductors
UBA2212
Half-bridge power IC family for CFL lamps
2.5 Safety
Saturation Current Protection (SCP)
OverTemperature Protection (OTP)
Capacitive Mode Protection (CMP)
2.6 Ease of use
Adjustable operating frequency for easy fit with various burners
3. Applications
Compact Fluorescent Lamps up to 23 W for 120 V (AC) indoor and outdoor
applications
4. Ordering information
Table 1.
Ordering information
Package
Name
UBA2212CP/1
UBA2212CT/1
DIP14
SO14
Description
plastic dual inline package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
Version
SOT27-1
SOT108-1
Type number
UBA2212
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 27 February 2012
2 of 18
NXP Semiconductors
UBA2212
Half-bridge power IC family for CFL lamps
5. Block diagram
V
DD
DVDT
5
HV
3
UBA2212
V
DD
V
O(ref)RMS
OTP170
OTP120
startup
6
4 PGND
V
DD
I
sat
reset
LATCH
reset
set
1 OUT
HSPT
DRIVER
HSPT
14 FS
GLOW AND I
sat
CONTROL
PULSE
RC 7
VOLTAGE
CONTROLLED
OSCILLATOR
f
osc
:2
V
SW
HS on
NON-OVERLAP LS on
TIMER
LSPT
DRIVER
LSPT
SW 8
boost/steady
12 SENSE
CB 9
preheat
boost/steady
RMS control
X
2
- V
O(ref)RMS2
preheat
PREHEAT TIMER
boost
BOOST TIMER
preheat
VO(ref)bst
0.3 V
VO(ref)
boost/steady
10 CSI
boost state
steady state
SGND 2, 11, 13
aaa-002491
Fig 1.
Block diagram
UBA2212
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 27 February 2012
3 of 18
NXP Semiconductors
UBA2212
Half-bridge power IC family for CFL lamps
6. Pinning information
6.1 Pinning
OUT
SGND
HV
PGND
DVDT
1
2
3
4
5
6
7
aaa-000382
14
FS
13
SGND
12
SENSE
OUT
SGND
HV
PGND
DVDT
V
DD
RC
1
2
3
4
5
6
7
001aan336
14
FS
13
SGND
12
SENSE
UBA2212
11
SGND
10
CSI
9
8
CB
SW
UBA2212
11 SGND
10 CSI
9
8
CB
SW
V
DD
RC
Fig 2.
Pin configuration for UBA2212CP (SOT27-1)
Fig 3.
Pin configuration for UBA2212CT (SOT108-1)
6.2 Pin description
Table 2.
Symbol
OUT
SGND
HV
PGND
DVDT
V
DD
RC
SW
CB
CSI
SENSE
FS
Pin description
Pin
1
2, 11, 13
3
4
5
6
7
8
9
10
12
14
Description
half-bridge output
signal ground
high-voltage supply
DVDT supply ground
DVDT supply input
internal low-voltage supply output
internal oscillator input
sweep timing and VCO input
boost timing capacitor/preheat integrating capacitor
current feedback sense input
current sense of LS MOSFET
high-side floating supply output
UBA2212
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 27 February 2012
4 of 18
NXP Semiconductors
UBA2212
Half-bridge power IC family for CFL lamps
7. Functional description
7.1 Supply voltage
The UBA2212 family is powered using a start-up current source and a DVDT supply.
When the voltage on pin HV increases, the V
DD
capacitor (C
VDD
) is charged using the
internal Junction gate Field-Effect Transistor (JFET) current source. The voltage on pin
V
DD
rises until V
DD
equals V
DD(start)
. The start-up current source is then disabled. The
half-bridge starts switching causing the charge pump to generate the required V
DD
supply.
The amount of current flowing towards V
DD
equals V
HV
C
DVDT
f where f represents the
momentary frequency. The charge pump consists of an external half-bridge capacitor
(C
DVDT
). The IC contains two internal diodes with an internal Zener diode. The Zener
diode ensures the V
DD
voltage cannot rise above the maximum V
DD
rating.
The DVDT supply has its own ground pin (PGND) to prevent large peak currents from
flowing through the external small signal ground pin (SGND).
The start-up current source is enabled when the voltage on pin V
DD
is below V
DD(stop)
.
7.2 Start-up state
When the supply voltage on pin V
DD
increases, the IC enters the start-up state. In the
start-up state, the High-Side Power Transistor (HSPT) is switched off and the Low-Side
Power Transistor (LSPT) is switched on. The circuit is reset and the capacitors on the
bootstrap pin FS (C
bs
) and the low-voltage supply pin V
DD
(C
VDD
) are charged. Pins RC
and SW are switched to ground.
When pin V
DD
is above V
DD(start)
, the start-up state is exited and the preheat state is
entered. If the voltage on pin V
DD
falls below V
DD(stop)
, the system returns to the start-up
state.
Remark:
If OTP is active, the IC remains in the start-up state for as long as this is the
case. The V
DD
voltage slowly oscillates between V
DD
= V
DD(stop)
and V
DD
= V
DD(start)
.
7.3 Reset
A DC reset circuit is incorporated in the high-side driver. The high-side transistor is
switched off when the voltage on pin FS is below the high-side lockout voltage.
7.4 Oscillation control
The oscillation frequency is based on the 555-timer function. A self oscillating circuit is
created comprising the external components: resistors R
osc
, R
SENSE
and capacitor C
osc
.
R
osc
and C
osc
determine the nominal oscillating frequency.
An internal divider 0.5
f
osc(int)
is used to generate the accurate 50 % duty cycle. The
divider sets the bridge frequency at half the oscillator frequency.
The input on pin SW generates signal V
SW
. The V
SW
signal is used to determine the
frequency in all states except preheat. Signal V
CB
is an internally generated signal used to
determine the frequency during the preheat state.
UBA2212
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 27 February 2012
5 of 18
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