L9375TRLF datasheet, PDF - EEWORLD Datasheet

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L9375TRLF: DescriptionGate driver 8-channel valve driver; CategoryAnalog mixed-signal IC Drivers and interfaces; File Size1MB，66 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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L9375TRLF Overview

Gate driver 8-channel valve driver

L9375TRLF Parametric

Parameter Name	Attribute value
Brand Name	STMicroelectronics
Maker	STMicroelectronics
Reach Compliance Code	compliant
ECCN code	EAR99
Interface integrated circuit type	PWM BASED PERIPHERAL DRIVER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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L9375TRLF

Eight channel valve driver

Datasheet

production data



16 bit serial peripheral interface (SPI), up to

5 MHz with diagnostics



Battery compatible supply voltage



Detailed load diagnostics

– Over load protection

– Open load (off-state)

– Under current

– Under voltage

– Temperature warning and shutdown

– Power or signal GND loss

– Recirculation diode loss

– Silent valve driver test

PowerSO-36

Features



Eight protected low-side drivers with

diagnostics

– Four 0.16

Ω(typ)

low side outputs (Q1 -

Q4)

– Four 0.2

Ω(typ)

PWM controlled outputs

(Q5 - Q8)



All outputs with 35 V (min) zener clamp



Programmable output timer



Clock monitor



Integrated recirculation diodes (Q5-Q8 only)

Description

The L9375TRLF is a SPI controlled octal channel

low side driver with integrated recirculation

diodes.

The output duty cycle (Q5 - Q8) can be

programmed individually. It is possible to program

two consecutive output duty cycles per channel

as well as an individual duration time for each

channel actuation (all channels).

Table 1. Device summary

Order code

L9375TRLF

Package

PowerSO-36 (slug down)

Packing

Tube

March 2014

This is information on a product in full production.

DocID026134 Rev 1

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www.st.com

Contents

L9375TRLF

Contents

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1

3.2

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

ESD susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.2.1

3.2.2

HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Supply current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Output power stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Recirculation diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Output timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Output configuration Q1 - Q4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Output configuration Q5 - Q8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Logic inputs / outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Logic outputs (MISO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Output stage diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

General diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Filtering times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Internal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

SPI timing characteristics SPICLK, MISO, MOSI, SPICS . . . . . . . . . . . 20

3.3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.3.1

3.3.2

3.3.3

3.3.4

3.3.5

3.3.6

3.3.7

3.3.8

3.3.9

3.3.10

3.3.11

3.3.12

3.3.13

Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.1

SPI serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.1.1

4.1.2

4.1.3

4.1.4

4.1.5

4.1.6

4.1.7

General protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

SPI failure detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Address decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Parity generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Initial MISO information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.2

Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

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4.2.1

4.2.2

4.2.3

Contents

Clock multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Internal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

CLKIN signal monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.3

Synchronization controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.3.1

4.3.2

Output synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Time shift between output actuation (Q5-Q8 only) . . . . . . . . . . . . . . . . 30

4.4

4.5

4.6

Set-point controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

PWM generator(Q5-Q8 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Output driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.6.1

4.6.2

Output driver controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Undercurrent / openload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Openload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Over current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Thermal warning and thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . 39

Power ground loss (PGND-loss) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Signal ground loss (SGND-loss) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Recirculation diode loss detection (Dx-loss)(Q5 - Q8 only) . . . . . . . . . . 40

SPI-failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

CLKIN-failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Sync-failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Silent valve driver test (SVDT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

4.7

Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

4.7.1

4.7.2

4.7.3

4.7.4

4.7.5

4.7.6

4.7.7

4.7.8

4.7.9

4.7.10

4.7.11

Programmers guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

5.1

Command registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

5.1.1

5.1.2

5.1.3

5.1.4

5.1.5

5.1.6

Sync + Sync-trigger register (address 0) . . . . . . . . . . . . . . . . . . . . . . . . 50

Sync tolerance window (STW) register (address 1) . . . . . . . . . . . . . . . 51

Configuration register (address 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Fast switch-on (FSON) register (address 3) . . . . . . . . . . . . . . . . . . . . . 53

Duration registers (address 4, 5, 14, and 15) . . . . . . . . . . . . . . . . . . . . 54

Duty cycle register (address 6 to 13) . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

General status (address 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Output status Q1 to Q8 (address 1 to 8) . . . . . . . . . . . . . . . . . . . . . . . . 58

Reserved (addresses 9 - 15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

5.2

Status registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

5.2.1

5.2.2

5.2.3

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L9375TRLF

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Table 36.

Table 37.

Table 38.

Table 39.

Table 40.

Table 41.

Table 42.

Table 43.

Table 44.

Table 45.

Table 46.

Table 47.

Table 48.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Output power stages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Recirculation diode electrical characteristics (Q5-Q8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Timing for outputs Q1 - Q4 (no edge shaping) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Output timing electrical characteristics (Q5-Q8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Symmetric switching of DMOS electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Q3 / Q4 (current controller) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

PWM output behavior characteristics (Q5 - Q8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Logic inputs electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Logic outputs (MISO) electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Diagnostic functions at output stage electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 18

General diagnostic functions electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

CLKIN-monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Failure filtering times characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

SVDT test timing (refer to

4.7.11: Silent valve driver test (SVDT))

. . . . . . . . . . . . . . . . . . . 19

Internal oscillator electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

SPI timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Command buffer (data_in) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Status buffer (data_out) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Clock validation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Sync. tolerance window interval length. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Example of PWM duration timing, t(n) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Timer t(n) resolution versus RESET_VALUE MSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Qx_ON and Qx_OFF provide gate voltage status history information . . . . . . . . . . . . . . . . 36

Output driver possible input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

SPI failure Response data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Fault diagnostic summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Status monitored during SVDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

SVDT command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

SVDT status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Sync + sync-trigger register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

STW value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Configuration register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Silent valve driver test (SVDT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

CLKIN_S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Fast switch off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Edge shaping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Fast switch-on. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Register duration value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Duration bit resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Duty cycle register (address 6 to 9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Status registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

CLKIN_S command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

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