MT25QL128ABB1ESE-0AUT datasheet, PDF

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MT25QL128ABB1ESE-0AUT: DescriptionNOR Flash SERIAL NOR SLC 32MX4 SOIC; Categorysemiconductor Memory IC NOR flash memory; File Size1MB，96 Pages; ManufacturerMicron; Websitehttp://www.micron.com/; Environmental Compliance

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MT25QL128ABB1ESE-0AUT Overview

NOR Flash SERIAL NOR SLC 32MX4 SOIC

MT25QL128ABB1ESE-0AUT Parametric

Parameter Name	Attribute value
Maker	Micron
Product Category	NOR flash memory
Installation style	SMD/SMT
Package/box	SOP2-8
series	MT25QL
storage	128 Mbit
Interface Type	SPI
organize	16 M x 8
Timing type	Synchronous
Data bus width	8 bit
Supply voltage - min.	2.7 V
Supply voltage - max.	3.6 V
Supply current—max.	35 mA
Minimum operating temperature	- 40 C
Maximum operating temperature	+ 125 C
Encapsulation	Tray
Factory packaging quantity	1800

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128Mb, 3V Multiple I/O Serial Flash Memory

Features

Micron Serial NOR Flash Memory

3V, Multiple I/O, 4KB, 32KB, 64KB, Sector Erase

MT25QL128ABB

Features

• SPI-compatible serial bus interface

• Single and double transfer rate (STR/DTR)

• Clock frequency

– 133 MHz (MAX) for all protocols in STR

– 90 MHz (MAX) for all protocols in DTR

• Dual/quad I/O commands for increased through-

put up to 90 MB/s

• Supported protocols: Extended, Dual, and Quad I/O

in both STR and DTR

• Execute-in-place (XIP)

• PROGRAM/ERASE SUSPEND operations

• Volatile and nonvolatile configuration settings

• Software reset

• Additional reset pin for selected part numbers

• Dedicated 64-byte OTP area outside main memory

– Readable and user-lockable

– Permanent lock with PROGRAM OTP command

• Erase capability

– Bulk erase

– Sector erase 64KB uniform granularity

– Subsector erase 4KB, 32KB granularity

• Erase performance

– 400KB/sec (64KB sector)

– 80KB/sec (4KB sub-sector)

• Program performance: 2MB/sec

• Security and write protection

– Volatile and nonvolatile locking and software

write protection for each 64KB sector

– Nonvolatile configuration locking

– Password protection

– Hardware write protection: nonvolatile bits

(BP[3:0] and TB) define protected area size

– Program/erase protection during power-up

– CRC detects accidental changes to raw data

• Electronic signature

– JEDEC-standard 3-byte signature (BA18h)

– Extended device ID: Two additional bytes identify

device factory options

• JESD47H-compliant

– Minimum 100,000 ERASE cycles per sector

– Data retention: 20 years (TYP)

Options

• Voltage

– 2.7–3.6V

• Density

– 128Mb

• Device stacking

– Monolithic

• Device generation

• Die revision

• Pin configuration

– RESET# and HOLD#

• Sector size

– 64KB

• Packages – JEDEC-standard, RoHS-

compliant

– 16-pin SOP2, 300 mils body width

(SO16W)

– 8-pin SOP2, 208 mils body width

(SO8W)

– 24-ball T-PBGA, 05/6mm × 8mm

(TBGA24)

– 24-ball T-PBGA 05/6mm × 8mm (4 ×

6 array)

– W-PDFN-8 8mm × 6mm (MLP8 8mm

× 6mm)

– W-PDFN-8 6mm × 5mm (MLP8 6mm

× 5mm)

• Standard security

• Special options

– Standard

– Automotive

• Operating temperature range

– From –40°C to +85°C

– From –40°C to +105°C

– From –40°C to +125°C

Marking

128

CCM005-1718347970-10423

mt25q_qlht_L_128_ABB_xxT.pdf - Rev. D 09/18 EN

Products and specifications discussed herein are subject to change by Micron without notice.

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb, 3V Multiple I/O Serial Flash Memory

Features

Contents

Important Notes and Warnings ......................................................................................................................... 8

Device Description ........................................................................................................................................... 9

Device Logic Diagram ................................................................................................................................. 10

Advanced Security Protection ..................................................................................................................... 10

Signal Assignments – Package Code: 12 ........................................................................................................... 11

Signal Assignments – Package Code: 14 ........................................................................................................... 12

Signal Assignments – Package Code: SE, W7, W9 .............................................................................................. 13

Signal Assignments – Package Code: SF ........................................................................................................... 14

Signal Descriptions ......................................................................................................................................... 15

Package Dimensions – Package Code: 12 ......................................................................................................... 17

Package Dimensions – Package Code: 14 ......................................................................................................... 18

Package Dimensions – Package Code: SE ......................................................................................................... 19

Package Dimensions – Package Code: SF ......................................................................................................... 20

Package Dimensions – Package Code: W7 ........................................................................................................ 21

Package Dimensions – Package Code: W9 ........................................................................................................ 22

Memory Map – 128Mb Density ....................................................................................................................... 23

Status Register ................................................................................................................................................ 24

Block Protection Settings ............................................................................................................................ 25

Flag Status Register ......................................................................................................................................... 26

Internal Configuration Register ....................................................................................................................... 27

Nonvolatile Configuration Register .................................................................................................................. 28

Volatile Configuration Register ........................................................................................................................ 29

Supported Clock Frequencies ..................................................................................................................... 30

Enhanced Volatile Configuration Register ........................................................................................................ 33

Security Registers ........................................................................................................................................... 34

Sector Protection Security Register .................................................................................................................. 35

Nonvolatile and Volatile Sector Lock Bits Security ............................................................................................ 36

Volatile Lock Bit Security Register .................................................................................................................... 36

Device ID Data ............................................................................................................................................... 37

Serial Flash Discovery Parameter Data ............................................................................................................. 38

Command Definitions .................................................................................................................................... 39

Software RESET Operations ............................................................................................................................ 44

RESET ENABLE and RESET MEMORY Commands ....................................................................................... 44

READ ID Operations ....................................................................................................................................... 45

READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 45

READ SERIAL FLASH DISCOVERY PARAMETER Operation .............................................................................. 46

READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 46

READ MEMORY Operations ............................................................................................................................ 47

READ MEMORY Operations Timings ............................................................................................................... 47

WRITE ENABLE/DISABLE Operations ............................................................................................................. 54

READ REGISTER Operations ........................................................................................................................... 55

WRITE REGISTER Operations ......................................................................................................................... 56

CLEAR FLAG STATUS REGISTER Operation ..................................................................................................... 58

PROGRAM Operations .................................................................................................................................... 59

PROGRAM Operations Timings ....................................................................................................................... 60

ERASE Operations .......................................................................................................................................... 63

SUSPEND/RESUME Operations ..................................................................................................................... 65

PROGRAM/ERASE SUSPEND Operations .................................................................................................... 65

PROGRAM/ERASE RESUME Operations ...................................................................................................... 65

ONE-TIME PROGRAMMABLE Operations ....................................................................................................... 67

CCM005-1718347970-10423

mt25q_qlht_L_128_ABB_xxT.pdf - Rev. D 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb, 3V Multiple I/O Serial Flash Memory

Features

READ OTP ARRAY Command ......................................................................................................................

PROGRAM OTP ARRAY Command ..............................................................................................................

DEEP POWER-DOWN Operations ...................................................................................................................

ENTER DEEP POWER-DOWN Command ....................................................................................................

RELEASE FROM DEEP POWER-DOWN Command .......................................................................................

DEEP POWER-DOWN Timings ....................................................................................................................

QUAD PROTOCOL Operations ........................................................................................................................

ENTER or RESET QUAD INPUT/OUTPUT MODE Command .......................................................................

CYCLIC REDUNDANCY CHECK Operations ....................................................................................................

State Table .....................................................................................................................................................

XIP Mode .......................................................................................................................................................

Activate and Terminate XIP Using Volatile Configuration Register .................................................................

Activate and Terminate XIP Using Nonvolatile Configuration Register ..........................................................

Confirmation Bit Settings Required to Activate or Terminate XIP ..................................................................

Terminating XIP After a Controller and Memory Reset .................................................................................

Power-Up and Power-Down ............................................................................................................................

Power-Up and Power-Down Requirements ..................................................................................................

Active, Standby, and Deep Power-Down Modes ................................................................................................

Power Loss and Interface Rescue .....................................................................................................................

Recovery ....................................................................................................................................................

Power Loss Recovery ...................................................................................................................................

Interface Rescue .........................................................................................................................................

Initial Delivery Status .....................................................................................................................................

Absolute Ratings and Operating Conditions .....................................................................................................

DC Characteristics and Operating Conditions ..................................................................................................

AC Characteristics and Operating Conditions ..................................................................................................

AC Reset Specifications ...................................................................................................................................

Program/Erase Specifications .........................................................................................................................

Revision History .............................................................................................................................................

Rev. D – 09/18 .............................................................................................................................................

Rev. C – 06/18 .............................................................................................................................................

Rev. B – 01/18 .............................................................................................................................................

Rev. A – 09/17 .............................................................................................................................................

CCM005-1718347970-10423

mt25q_qlht_L_128_ABB_xxT.pdf - Rev. D 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

128Mb, 3V Multiple I/O Serial Flash Memory

Features

List of Figures

Figure 1: Part Number Ordering Information .................................................................................................... 2

Figure 2: Block Diagram .................................................................................................................................. 9

Figure 3: Logic Diagram ................................................................................................................................. 10

Figure 4: 24-Ball T-BGA, 5 x 5 (Balls Down) ..................................................................................................... 11

Figure 5: 24-Ball TBGA, 4 x 6 (Balls Down) ...................................................................................................... 12

Figure 6: 8-Pin, SOP2 or W-PDFN (Top View) ................................................................................................. 13

Figure 7: 16-Pin, Plastic Small Outline – SO16 (Top View) ................................................................................ 14

Figure 8: 24-Ball T-PBGA (5 x 5 ball grid array) – 6mm x 8mm .......................................................................... 17

Figure 9: 24-Ball T-PBGA (24b05) – 6mm x 8mm ............................................................................................. 18

Figure 10: 8-Pin SOP2 (SO8W) – 208 Mils Body Width ..................................................................................... 19

Figure 11: 16-Pin SOP2 – 300 Mils Body Width ................................................................................................ 20

Figure 12: W-PDFN-8 (MLP8) – 6mm x 5mm .................................................................................................. 21

Figure 13: W-PDFN-8 (MLP8) – 8mm x 6mm .................................................................................................. 22

Figure 14: Internal Configuration Register ...................................................................................................... 27

Figure 15: Sector and Password Protection ..................................................................................................... 34

Figure 16: RESET ENABLE and RESET MEMORY Command ........................................................................... 44

Figure 17: READ ID and MULTIPLE I/O READ ID Commands ......................................................................... 45

Figure 18: READ SERIAL FLASH DISCOVERY PARAMETER Command – 5Ah ................................................... 46

Figure 19: READ – 03h ................................................................................................................................... 47

Figure 20: FAST READ – 0Bh .......................................................................................................................... 48

Figure 21: DUAL OUTPUT FAST READ – 3Bh .................................................................................................. 48

Figure 22: DUAL INPUT/OUTPUT FAST READ – BBh ..................................................................................... 49

Figure 23: QUAD OUTPUT FAST READ – 6Bh ................................................................................................. 49

Figure 24: QUAD INPUT/OUTPUT FAST READ – EBh ..................................................................................... 50

Figure 25: QUAD INPUT/OUTPUT WORD READ – E7h ................................................................................... 50

Figure 26: DTR FAST READ – 0Dh .................................................................................................................. 51

Figure 27: DTR DUAL OUTPUT FAST READ – 3Dh .......................................................................................... 51

Figure 28: DTR DUAL INPUT/OUTPUT FAST READ – BDh ............................................................................. 52

Figure 29: DTR QUAD OUTPUT FAST READ – 6Dh ......................................................................................... 52

Figure 30: DTR QUAD INPUT/OUTPUT FAST READ – EDh ............................................................................. 53

Figure 31: WRITE ENABLE and WRITE DISABLE Timing ................................................................................. 54

Figure 32: READ REGISTER Timing ................................................................................................................ 55

Figure 33: WRITE REGISTER Timing .............................................................................................................. 57

Figure 34: CLEAR FLAG STATUS REGISTER Timing ........................................................................................ 58

Figure 35: PAGE PROGRAM Command .......................................................................................................... 60

Figure 36: DUAL INPUT FAST PROGRAM Command ...................................................................................... 61

Figure 37: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 61

Figure 38: QUAD INPUT FAST PROGRAM Command ..................................................................................... 62

Figure 39: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 62

Figure 40: SUBSECTOR and SECTOR ERASE Timing ....................................................................................... 64

Figure 41: BULK ERASE Timing ...................................................................................................................... 64

Figure 42: PROGRAM/ERASE SUSPEND and RESUME Timing ........................................................................ 66

Figure 43: READ OTP ARRAY Command Timing ............................................................................................. 67

Figure 44: PROGRAM OTP Command Timing ................................................................................................. 68

Figure 45: ENTER DEEP POWER-DOWN Timing ............................................................................................. 70

Figure 46: RELEASE FROM DEEP POWER-DOWN Timing ............................................................................... 71

Figure 47: XIP Mode Directly After Power-On .................................................................................................. 76

Figure 48: Power-Up Timing .......................................................................................................................... 79

Figure 49: AC Timing Input/Output Reference Levels ...................................................................................... 84

Figure 50: Reset AC Timing During PROGRAM and ERASE Cycle ..................................................................... 91

CCM005-1718347970-10423

mt25q_qlht_L_128_ABB_xxT.pdf - Rev. D 09/18 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

MT25QL128ABB1ESE-0AUT Related Products

	MT25QL128ABB1ESE-0AUT	MT25QL128ABB8E12-0AUT TR	MT25QL128ABB1ESE-0AUT TR	MT25QL128ABB8ESF-0AUT TR	MT25QL128ABB8E12-0AUT	MT25QL128ABB8ESF-0AUT
Description	NOR Flash SERIAL NOR SLC 32MX4 SOIC	NOR flash SERIAL NOR 128M MT25Q 45nm IT	NOR flash memory	NOR flash SERIAL NOR 128M MT25Q 45nm IT	NOR flash SERIAL NOR 128M MT25Q 45nm IT	NOR flash SERIAL NOR 128M MT25Q 45nm IT
Maker	Micron	Micron	Micron	Micron	Micron	Micron
Product Category	NOR flash memory	NOR flash memory	NOR flash memory	NOR flash memory	NOR flash memory	NOR flash memory
series	MT25QL	MT25QL	MT25QL	MT25QL	MT25QL	MT25QL
storage	128 Mbit	128 Mbit	128 Mbit	128 Mbit	128 Mbit	128 Mbit
Interface Type	SPI	Serial	SPI	Serial	Serial	Serial
Encapsulation	Tray	Reel	Reel	Reel	Tray	Tray
Factory packaging quantity	1800	2000	1500	1000	1122	1440

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