dsPIC33CK128MP203-E/M5 datasheet, PDF

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dsPIC33CK128MP203-E/M5: DescriptiondsPIC33C 100MHz 128K Dual Panel Flash 16K RAM OpAmps 12bit ADCs PWM; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，621 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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dsPIC33CK128MP203-E/M5 Overview

dsPIC33C 100MHz 128K Dual Panel Flash 16K RAM OpAmps 12bit ADCs PWM

dsPIC33CK128MP203-E/M5 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	7215971577
package instruction	UQFN-36
Reach Compliance Code	compliant
Country Of Origin	Thailand
Factory Lead Time	7 weeks
Samacsys Description	MCU 16-bit dsPIC CISC 128KB Flash 3.3V Automotive 36-Pin UQFN EP Tube
Samacsys Manufacturer	Microchip
Samacsys Modified On	2023-03-07 16:10:32
YTEOL	20.03
barrel shifter	YES
bit size	16
boundary scan	YES
maximum clock frequency	64 MHz
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PQCC-N36
JESD-609 code	e3
length	5 mm
low power mode	YES
Number of DMA channels	4
Number of external interrupt devices	4
Number of serial I/Os	4
Number of terminals	36
Number of timers	2
On-chip data RAM width	8
On-chip program ROM width	24
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC36,.2SQ,16
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
RAM (number of words)	16384
ROM programmability	FLASH
Filter level	AEC-Q100
Maximum seat height	0.6 mm
Maximum slew rate	42.5 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.4 mm
Terminal location	QUAD
width	5 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, CONTROLLER

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dsPIC33CK256MP508 FAMILY

28/36/48/64/80-Pin, 16-Bit Digital Signal Controllers

with High-Resolution PWM and CAN Flexible Data (CAN FD)

Operating Conditions

• 3.0V to 3.6V, -40°C to +85°C, DC to 100 MIPS

• 3.0V to 3.6V, -40°C to +125°C, DC to 100 MIPS

Power Management

• Low-Power Management Modes (Sleep,

Idle, Doze)

• Integrated Power-on Reset and Brown-out Reset

Core: 16-Bit dsPIC33CK CPU

• 32-256 Kbytes of Program Flash with ECC and

8-24K RAM

• Fast 6-Cycle Divide

• LiveUpdate

• Code Efficient (C and Assembly) Architecture

• 40-Bit Wide Accumulators

• Single-Cycle (MAC/MPY) with Dual Data Fetch

• Single-Cycle, Mixed-Sign MUL Plus

Hardware Divide

• 32-Bit Multiply Support

• Four Sets of Interrupt Context Saving Registers

which Include Accumulator and STATUS for Fast

Interrupt Handling

• Zero Overhead Looping

• RAM Memory Built-In Self-Test (MBIST)

High-Speed PWM

8 PWM Pairs

Up to 250 ps PWM Resolution

Dead Time for Rising and Falling Edges

Dead-Time Compensation

Clock Chopping for High-Frequency Operation

PWM Support for:

- DC/DC, AC/DC, inverters, PFC, lighting

- BLDC, PMSM, ACIM, SRM motors

• Fault and Current Limit Inputs

• Flexible Trigger Configuration for ADC Triggering

•

Timers/Output Compare/Input Capture

• One General Purpose Timer

• Peripheral Trigger Generator (PTG):

- Up to 15 trigger sources to other

peripheral modules

- CPU independent state machine-based

instruction sequencer

• Nine MCCP/SCCP modules which Include Timer,

Capture/Compare and PWM:

- 1 MCCP

- 8 SCCPs

- 16 or 32-bit time base

- 16 or 32-bit capture

- 4-deep capture buffer

• Fully Asynchronous Operation, Available in

Sleep Modes

Clock Management

•

Internal Oscillator

Programmable PLLs and Oscillator Clock Sources

Reference Clock Output

Fail-Safe Clock Monitor (FSCM)

Fast Wake-up and Start-up

Backup Internal Oscillator



2017-2018 Microchip Technology Inc.

Advance Information

DS70005349B-page 1

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