S i 3 4 0 2 -C
F
U L LY
-
I N T E G RA T E D
I E E E 8 0 2 . 3 - C
O M P LI A N T
P
O
E P D I
N T E RFA C E A N D
L
O W
- E M I S
WI T C H I N G
R
E G U L A T O R
Features
Pin-compatible replacement for the
obsolete Si3402-A
IEEE 802.3 standard-compliant
solution, including pre-standard
(legacy) PoE support
Highly-integrated IC enables
compact solution footprints
Minimal external components
Integrated diode bridges and
transient surge suppressor
Integrated switching regulator
controller with on-chip power FET
Integrated dual current-limited
hotswap switch
Programmable classification circuit
Incorporates switcher EMI-
reduction techniques.
Supports non-isolated and isolated
switching topologies
Comprehensive protection circuitry
Transient overvoltage protection
Undervoltage lockout
Thermal shutdown protection
Foldback current limiting
Allows external Schottky diode
bypass of integrated diode bridges
without requiring CT/SP pin
connection
Low-profile 5 x 5 mm 20-pin QFN
RoHS-compliant
Ordering Information:
See page 18.
Pin Assignments
5 x 5 mm QFN
(Top View)
VPOSS
16
Applications
VSS2
Voice over IP telephones and
adapters
Wireless access points
Security cameras
Point-of-sale terminals
Internet appliances
Network devices
High power applications
20
19
18
17
15
EROUT
SSFT*
VDD
1
2
3
VSSA
VSS1
SWO
FB
14
CT1
VNEG
(PAD)
13
CT2
12
11
Description
The Si3402 integrates all power management and control functions required in a
Power-over-Ethernet (PoE) powered device (PD) application. The Si3402
converts the high voltage supplied over the 10/100/1000BASE-T Ethernet
connection into a regulated, low-voltage output supply. The optimized
architecture of the Si3402 minimizes the solution footprint, reduces external
BOM cost, and enables the use of low-cost external components while
maintaining high performance. The Si3402 integrates the required diode bridges
and transient surge suppressor, thus enabling direct connection of the IC to the
Ethernet RJ-45 connector. The switching power FET and all associated
functions are also integrated. The integrated switching regulator supports
isolated (flyback) and non-isolated (buck) converter topologies. The Si3402
supports IEEE 802.3 Type 1 (Class 3 and below) Powered Device applications.
Standard external resistors connected to the Si3402 provide the proper IEEE
802.3 signatures for the detection function and programming of the requested
power class. Startup circuits ensure well-controlled initial operation of both the
hotswap switch and the voltage regulator. The Si3402 is available in a low-
profile, 20-pin, 5 x 5 mm QFN package. The Si3402-C is a pin-compatible
replacement of the obsolete Si3402-A. PCB layouts designed for Si3402-A can
be reused with Si3402-C, but some component value changes are required.
The Si3402-C’s functionality is similar to that of the Si3402-B but without the
requirement to make a connection between the Ethernet jack and CT1, CT2,
SP1, or SP2 pins when bypassing the integrated diode bridge with external
Schottky diodes. Further, PLOSS functionality is removed from the Si3402-C.
VPOSF
SP1
ISOSSFT*
4
5
6
7
8
9
10
VNEG
RDET
Note:
Original pin names shown for compatibil-
ity reasons, but SSFT, ISOSSFT, VPOSS,
and VSS1 are not internally connected.
Rev. 1.0 12/16
Copyright © 2016 by Silicon Laboratories
HSO
RCL
SP2
NC
Si3402-C
Si3402-C
Functional Block Diagram
VPOSF VPOSS*
RDET
RCL
SSFT*
VDD
IS O S S F T *
Rectification
CT1
CT2
SP1
SP2
Protection
D e te c tio n
&
C la s s ific a tio n
H o ts w a p
S w itc h
&
C u rre n t lim it
H o ts w a p
C o n tro l
&
Com m on
B ia s
P W M C o n tro l
and EM I
L im itin g
EROUT
FB
&
S w itc h in g
FET
SW O
VNEG
HSO
PLO SS VSSA
VSS1*
VSS2
N o te
: O rig in a l p in n a m e s s h o w n fo r c o m p a tib ility re a s o n s, b u t S S F T , IS O S S F T ,
V P O S S , a n d V S S 1 a re n o t in te rn a lly c o n n e c te d.
2
Rev. 1.0
Si3402-C
T
ABLE O F
C
ONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematics* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3.2. PD Hotswap Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.3. Isolated and Non-Isolated Application Topologies . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4. Switching Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5. Output Voltage and Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6. Recommended Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
8. Device Marking Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Rev. 1.0
3
Si3402-C
1. Electrical Specifications
Table 1. Recommended Operating Conditions
Description
|CT1 – CT2| or |SP1 – SP2|
Ambient Operating Temperature
Symbol
VPORT
TA
Min
2.8
–40
Typ
—
25
Max
57
85
Units
V
°C
Note:
Unless otherwise noted, all voltages referenced to VNEG. All minimum and maximum specifications are guaranteed
and apply across the recommended operating conditions. Typical values apply at nominal supply voltage and ambient
temperature unless otherwise noted.
Table 2. Absolute Maximum Ratings
1
Type
CT1 to CT2
2
SP1 to SP2
2
VPOS
HSO
Voltage
V
SS1
, V
SS2
, or V
SSA
V
SS1
to V
SS2
or V
SSA
SWO
3
RDET
VDD to VSS1, VSS2, or VSSA
Peak Current
DC Current
4
Ambient Temperature
CT1, CT2, SP1, SP2
2
VPOS
2
CT1,CT2,SP1,SP2
Storage
Operating
Description
Rating
–100 to 100
–100 to 100
–0.7 to 100
–0.7 to 100
–0.7 to 100
–0.3 to 0.3
–0.7 to 100
–0.7 to 100
–0.3 to 5.5
–5 to 5
–5 to 5
–0.2 to 0.2
–65 to 150
–40 to 85
Unit
V
V
V
V
V
V
V
V
V
A
A
A
°C
°C
Notes:
1.
Unless otherwise noted, all voltages referenced to VNEG. Permanent device damage may occur if the maximum
ratings are exceeded. Functional operation should be restricted to those conditions specified in the operational
sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may adversely affect
device reliability.
2.
Si3402 provides internal protection from certain transient surge voltages on these pins. Please refer to “AN1050:
Si3402-C POE PD Controller Design Guide” for details.
3.
SWO is referenced to V
SS2
.
4.
Higher dc current is possible in the application, but only utilizing external bridge diodes. Refer to “AN1050: Si3402-C
POE PD Controller Design Guide” for more information.
4
Rev. 1.0
Si3402-C
Table 3. Electrical Characteristics
Parameter
Description
Detection
1
Classification
UVLO turn-off for rising volt-
ages (switching regulator
turns ON)
UVLO turn-on for falling volt-
ages (switching regulator
turns OFF)
Integrated Transient Surge
Clamp Voltage
2
Input Offset Current
Diode Bridge Leakage
VPORT < 10 V
VPORT = 57 V
Class 0
IPORT Classification
3
Class 1
Class 2
Class 3
IPORT Operating Current
4
Current Limit
5
Hotswap FET On-Resistance
Switcher Frequency
Maximum Switcher Duty Cycle
Switcher Output Transient Voltage
6
Switching FET On-Resistance
Switching FET Peak Current
Regulated Feedback @ Pin FB
7
DC Avg.
37 V < VPORT < 57 V
Inrush
Operating
37 V < VPORT < 57 V
Min
2.7
14
—
Typ
—
—
37
Max
11
22
42
V
30
32
36
Unit
VPORT
—
—
—
0
9
17
26
—
—
470
1
—
—
—
0.3
—
1.30
100
—
—
—
—
—
—
2
140
—
—
350
50
—
0.5
—
1.35
—
10
25
4
12
20
30
3.1
—
680
3
—
75
100
1.3
2.4
1.40
mA
mA
mA
kHz
%
V
A
V
mA
µA
µA
Notes:
1.
Assumes use of internal diode bridge or external Schottky bridge.
2.
Transient surge as defined in IEEE 802.3 is applied across CT1-CT2 or SP1-SP2.
3.
The classification currents are guaranteed only when recommended RCLASS resistors are used, as specified in
Table 7.
4.
IPORT includes full operating current of switching regulator controller.
5.
The PD interface includes dual-level input current limit. At turn-on, before the HSO load capacitor is charged, the
current limit is set at the inrush level. After the capacitor has been charged within ~0.4 V of VNEG, the operating
current limit is engaged. This higher current limit remains active until the UVLO lower limit has been tripped or until the
hotswap switch is sufficiently current-limited to cause a foldback of the HSO voltage. For more information, see "3.2.5.
Dual Input Current Limit and Switcher Turn-On" on page 11.
6.
For switcher output transient voltage control with isolated applications, please use a voltage snubber circuit. Refer to
“AN1050: Si3402-C POE PD Controller Design Guide” for additional guidance on voltage snubber circuit design.
7.
Applies to non-isolated applications only.
Rev. 1.0
5