Features
•
Serial Peripheral Interface (SPI) Compatible
•
Supports SPI Modes 0 (0,0) and 3 (1,1)
•
– Datasheet Describes Mode 0 Operation
Low-voltage and Standard-voltage Operation
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
20 MHz Clock Rate (5V)
32-byte Page Mode
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software
Data Protection
Self-timed Write Cycle (5 ms max)
High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
Available in Automotive
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead MAP, 8-lead Ultra Thin
Mini-MAP (MLP 2x3) and 8-lead TSSOP Packages
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
•
•
•
•
•
•
•
•
•
SPI Serial
EEPROMs
8K (1024 x 8)
16K (2048 x 8)
32K (4096 x 8)
64K (8192 x 8)
AT25080A
AT25160A
AT25320A
AT25640A
Not
Recommended
for New Design
Description
The AT25080A/160A/320A/640A provides 8192/16384/32768/65536 bits of serial
electrically-erasable programmable read-only memory (EEPROM) organized as
1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25080A/160A/320A/640A is available in space-saving 8-lead
PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-
lead TSSOP and 8-Lead Ultra Leadframe Land Grid Array (ULLGA) packages.
The AT25080A/160A/320A/640A is enabled through the Chip Select pin (CS) and
accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data
Output (SO), and Serial Clock (SCK). All programming cycles are completely self-
timed, and no separate erase cycle is required before write.
3347M–SEEPR–06/07
Table 0-1.
Pin Name
CS
SCK
SI
SO
GND
VCC
WP
HOLD
NC
DC
Pin Configuration
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
No Connect
Don’t Connect
VCC
HOLD
SCK
SI
CS
SO
WP
GND
CS
SO
WP
GND
8-lead PDIP
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
GND
8-lead SOIC
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
8-lead TSSOP
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
8-lead Ultra Thin Mini-MAP (MLP 2x
VCC 8
HOLD 7
SCK 6
SI 5
1
2
3
4
CS
SO
WP
GND
Bottom View
8-lead MAP
8
7
6
5
1
2
3
4
CS
SO
WP
GND
8-lead ULLGA
VCC
HOLD
SCK
SI
8
7
6
5
1
2
3
4
CS
SO
WP
GND
Bottom View
Bottom View
Block write protection is enabled by programming the status register with one of four blocks of
write protection. Separate program enable and program disable instructions are provided for
additional data protection. Hardware data protection is provided via the WP pin to protect
against inadvertent write attempts to the status register. The HOLD pin may be used to suspend
any serial communication without resetting the serial sequence.
1. Absolute Maximum Ratings*
Operating Temperature ................................ –55C to +125C
Storage Temperature.................................... –65C to +150C
Voltage on Any Pin
with Respect to Ground ....................................–1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
2
AT25080A/160A/320A/640A
3347L–SEEPR–06/07
AT25080A/160A/320A/640A
Figure 1-1.
Block Diagram
Table 1-1.
Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted)
Symbol
C
OUT
C
IN
Note:
Test Conditions
Output Capacitance (SO)
Input Capacitance (CS, SCK, SI, WP, HOLD)
1. This parameter is characterized and is not 100% tested.
Max
8
6
Units
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
3
3347L–SEEPR–06/07
Table 1-2.
DC Characteristics
Applicable over recommended operating range from: T
AI
=
–
40C to +85C, V
CC
= +1.8V to +5.5V (unless otherwise noted)
Symbol
V
CC1
V
CC2
V
CC3
I
CC1
I
CC2
I
CC3
I
SB1
I
SB2
I
SB3
I
IL
I
OL
V
IL
(1)
V
IH
(1)
V
OL1
V
OH1
V
OL2
V
OH2
Notes:
Parameter
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current
Supply Current
Supply Current
Standby Current
Standby Current
Standby Current
Input Leakage
Output Leakage
Input Low-voltage
Input High-voltage
Output Low-voltage
Output High-voltage
Output Low-voltage
Output High-voltage
4.5V
V
CC
5.5V
1.8V
V
CC
3.6V
I
OL
= 3.0 mA
I
OH
=
1.6
mA
I
OL
= 0.15 mA
I
OH
=
100
µA
V
CC
- 0.2
V
CC
- 0.8
0.2
V
CC
= 5.0V at 20 MHz, SO = Open, Read
V
CC
= 5.0V at 20 MHz, SO = Open, Read,
Write
V
CC
= 5.0V at 5 MHz, SO = Open,
Read, Write
V
CC
= 1.8V, CS = V
CC
V
CC
= 2.7V, CS = V
CC
V
CC
= 5.0V, CS = V
CC
V
IN
= 0V to V
CC
V
IN
= 0V to V
CC
, T
AC
= 0°C to 70°C
–3.0
–3.0
–0.6
V
CC
x 0.7
Test Condition
Min
1.8
2.7
4.5
7.5
4.0
4.0
< 0.1
0.3
2.0
Typ
Max
5.5
5.5
5.5
10.0
10.0
6.0
6.0
(2)
7.0
(2)
10.0
(2)
3.0
3.0
V
CC
x 0.3
V
CC
+ 0.5
0.4
Units
V
V
V
mA
mA
mA
µA
µA
µA
µA
µA
V
V
V
V
V
V
1. V
IL
min and V
IH
max are reference only and are not tested.
2. Worst case measured at 85C
4
AT25080A/160A/320A/640A
3347L–SEEPR–06/07
AT25080A/160A/320A/640A
Table 1-3.
AC Characteristics
Applicable over recommended operating range from T
AI
=
–
40C to +85C, V
CC
= As Specified,
CL = 1 TTL Gate and 30 pF (unless otherwise noted)
Symbol
Parameter
SCK Clock Frequency
Voltage
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
4.5–5.5
2.7–5.5
1.8–5.5
20
40
80
20
40
80
25
50
100
25
50
100
25
50
100
5
10
20
5
10
20
5
10
20
5
10
20
0
0
0
0
0
0
20
40
80
ns
Min
0
0
0
Max
20
10
5
2
2
2
2
2
2
Units
MHz
f
SCK
t
RI
Input Rise Time
µs
t
FI
Input Fall Time
µs
t
WH
SCK High Time
ns
t
WL
SCK Low Time
ns
t
CS
CS High Time
ns
t
CSS
CS Setup Time
ns
t
CSH
CS Hold Time
ns
t
SU
Data In Setup Time
ns
t
H
Data In Hold Time
ns
t
HD
HOLD Setup Time
t
CD
HOLD Hold Time
t
V
Output Valid
ns
t
HO
Output Hold Time
ns
5
3347L–SEEPR–06/07
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