QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 854
16/14 BIT, 130,105, 80, 65 MSPS ADC
LTC2208, LTC2208-14, LTC2217, LTC2216, LTC2215
DESCRIPTION
Demonstration circuit 854 supports a family of
16/14-Bit 130Msps ADCs. Each assembly features
one of the following devices: LTC2208, LTC2208-
14, LTC2217, LTC2216, LTC2215 high speed family
of high dynamic range ADCs.
This Demonstration circuit only supports CMOS
operation. For demonstration of LVDS output sig-
naling, please see DC996.
Other members of this family include the LTC2207, a
105Msps 16-Bit CMOS-only version of this device, as
well as lower speed versions and single-ended clock
versions. These 7x7mm QFN devices are supported by
Demonstration circuits 918 and 919 (for single-ended
clock input).
1.
DC854 Variants
VARIANTS
DC854 VARIANT S
854D-A
854D-B
854D-C
854D-D
854D-E
854D-F
854D-G
854D-H
854D-I
854D-J
854C-P
854C-Q
ADC PART NUMBER
LTC2208
LTC2208
LTC2208-14
LTC2208-14
LTC2217
LTC2217
LTC2216
LTC2216
LTC2215
LTC2215
LTC2208
LTC2208-14
RESOLUTION*
16-Bit
16-Bit
14-Bit
14-Bit
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
16-Bit
14-Bit
MAXIMUM SAMPLE RATE
SA M
130Msps
130Msps
130Msps
130Msps
105Msps
105Msps
80Msps
80Msps
65Msps
65Msps
130Msps
130Msps
INPUT FREQUENCY
1MHz - 70MHz
70MHz -140MHz
1MHz - 70MHz
70MHz -140MHz
1MHz - 70MHz
70MHz -140MHz
1MHz - 70MHz
70MHz -140MHz
1MHz - 70MHz
70MHz -140MHz
>140MHz
>140MHz
The versions of the DC854C and DC854D demo
board that support the LTC2208 16-Bit and
LTC2208-14 14-Bit series of A/D converters are
listed in Table 1. Depending on the required reso-
lution, sample rate and input frequency, the DC854
is supplied with the appropriate ADC and with an
optimized input circuit. The circuitry on the analog
inputs is optimized for analog input frequencies be-
low 70MHz or from 70MHz to 140MHz. For higher
input frequencies, contact the factory for support.
avail
Design files for this circuit board are available.
Call the LTC factory.
LTC is a trademark of Linear Technology Corporation
1
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 854
16/14 BIT, 130,105, 80, 65 MSPS ADC
2.
Performance Summary (T
A
= 25°C)
Sum
CONDITION
VALUE
Depending on sampling rate and the A/D converter provided, Optimized for 3.3V
this supply must provide up to 500mA.
[3.15V 3.45V min/max]
Depending on PGA Pin Voltage
Minimum Logic High
Maximum Logic Low
Logic Output Voltage
(74VCX245 output buffer, V
cc
= 2.5V)
Sampling Frequency (Convert Clock Frequency)
Convert Clock Level
Minimum Logic High @ -1.6mA
Maximum Logic Low @ 1.6mA
See Table 1
50
Ω
Source Impedance, AC coupled or ground referenced
(Convert Clock input is capacitor coupled on board and ter-
minated with 50Ω.)
See Table 1
See Table 1
See Applicable Data Sheet
See Applicable Data Sheet
2V
P-P
2.5V
P-P
Sine Wave
1.5V
PP
to 2.25V
PP
2.4V
0.8V
2.3V (33Ω Series terminations)
0.7V (33Ω Series terminations)
PARAMETER
Supply Voltage
Analog input range
Logic Input Voltages
or Square wave
Resolution
Input frequency range
SFDR
SNR
PROCEDURE
QUICK START PROCEDURE
Demonstration circuit 854 is easy to set up to evalu-
ate the performance of most members of the
LTC2208 family of A/D converters. Refer to Figure 1
SETUP
If a DC718 QuickDAACS Data Analysis and Collection
System was supplied with the DC854 demonstration
circuit, follow the DC718 Quick Start Guide to install
for proper measurement equipment setup and follow
the procedure below:
the required software and for connecting the DC718 to
the DC854 and to a PC running Windows98, 2000 or
XP.
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QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 854
16/14 BIT, 130,105, 80, 65 MSPS ADC
1)
DC854 Setup (zoom for detail)
JUMPERS
JUMPERS
The DC854 demonstration circuit board
should have the following jumper set-
tings as default: (as per figure 1)
JP1:
JP2:
JP3:
JP4:
JP5:
JP6:
Output clock polarity: GND
SENSE: VDD, (Internal reference)
PGA: GND 2.25V range
RAND: GND Not randomized
SHDN: GND Not Shutdown
DITH: GND No internal dithering
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QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 854
16/14 BIT, 130,105, 80, 65 MSPS ADC
are capacitive coupled to Balun transformers ETC1-
1-13, or directly coupled through Flux coupled
transformers ETC1-1T. (See Schematic)
POWER
If a DC718 is used to acquire data from the DC854,
the DC718 must FIRST be connected to a powered
USB port or provided an external 6-9V BEFORE ap-
plying +3.3V across the pins marked “+3.3V” and
“PWR GND” on the DC854. The DC854 demonstra-
tion circuit requires up to 500mA depending on the
sampling rate and the A/D converter supplied.
The DC718 data collection board is powered by the
USB cable and does not require an external power
supply unless it is connected to the PC through an
un-powered hub. In this case it must be supplied
with 6-9V on turrets G7 (+) and G1 (-) or the adja-
cent 2.1mm power jack.
ENCODE CLOCK
in
NOTE: This is not a logic compatible in put. It is
terminated
Ohms.
terminated with 50 Ohms Apply an encode clock
to the SMA connector on the DC854 demonstration
circuit board marked “J3 ENCODE INPUT”. The
transformer is terminated on the secondary side
with 100 ohms, and further terminated at the ADC
(at C11).
For the best noise performance, the ENCODE INPUT
must be driven with a very low jitter source. When
using a sinusoidal generator, the amplitude should
often be large, up to 3V
P-P
or 13dBm. Using band
pass filters on the clock and the analog input will
improve the noise performance by reducing the
wideband noise power of the signals. Data sheet
FFT plots are taken with 10 pole LC filters made by
TTE (Los Angeles, CA) to suppress signal generator
harmonics, non-harmonically related spurs and
broad band noise. Low phase noise Agilent 8644B
generators are used with TTE band pass filters for
both the Clock input and the Analog input.
Apply the analog input signal of interest to the SMA
connectors on the DC854 demonstration circuit
board marked “J2 ANALOG INPUT”. These inputs
ANALOG INPUT NETWORK
For optimal distortion and noise performance the
RC network on the analog inputs should be opti-
mized for different analog input frequencies. Refer
to the provided schematics. These two input net-
works cover a broad bandwidth and are not opti-
mized for operation at a specific input frequency.
For input frequencies less than 5MHz, or greater
than 150MHz, other input networks may be more
appropriate.
In almost all cases, filters will be required on both
analog input and encode clock to provide data sheet
SNR.
This Demo board has provision for additional com-
ponents that may be used to implement a band
pass filter, or more optimal return loss in a given
frequency range. The default population is a simple
network as shown below.
In some cases, 3-10dB pads may be required to
obtain low distortion.
If your generator cannot deliver full scale signals
without distortion, you may benefit from a medium
power amplifier based on a Gallium Arsenide Gain
block prior to the final filter. This is particularly true
at higher frequencies where IC based operational
amplifiers may be unable to deliver the combination
of low noise figure and High IP3 point required. A
high order filter can be used prior to this final am-
plifier, and a relatively low Q filter used between the
amplifier and the demo circuit.
DIGITAL OUTPUTS
An internally generated conversion clock output is
available on pin 3 of J1 and the data samples are
available on Pins 7-37 for 16-Bits (or 7-33 for 14-
Bits) of J1 which can be collected via a logic ana-
lyzer, cabled to a development system through a
4
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 854
16/14 BIT, 130,105, 80, 65 MSPS ADC
SHORT 2 to 4 inch long 40-pin ribbon cable or col-
lected by the DC718 QuickEval-II Data Acquisition
Board.
SOFTWARE
The DC718B board is configurable by
PScope Sys-
tem Software
provided or down loaded from the
Linear
Technology
website
at
http://www.linear.com/software/.
If a DC718 was
provided, follow the DC718 Quick Start Guide and
the instructions below.
To start the data collection software if
“
PScope.exe
”, is installed (by default) in
\Program Files\LTC\PScope\, double click the
PScope Icon or bring up the run window under the
start menu and browse to the PScope directory and
select PScope.
If the DC854 demonstration circuit is properly con-
nected to the DC718, PSCOPE should automatically
detect the DC854, and configure itself accordingly.
If necessary the procedure below explains how to
manually configure PSCOPE.
Configure PScope for the appropriate variant of the
DC854 demonstration circuit by selecting the cor-
rect A/D Converter as installed on the DC854. Un-
der the “Configure” menu, go to “Device.” Under
the “Device” pull down menu, select the appropriate
device. Selecting the part in the Device List will
automatically blank the last two LSBs when using a
DC854 supplied with a 14-Bit part. If you are oper-
ating with a version of PScope that does not include
the IC of interest it can be manually selected by us-
ing the device menu. PScope may be manually
configure by selecting the following options:
User configure
16-Bit (or 14-Bit if using LTC2208-14)
Alignment: Left-16
Bipolar (2’s complement)
Positive clock edge
Type: CMOS
If everything is hooked up properly, powered and a
suitable convert clock is present, clicking the “Col-
lect” button should result in time and frequency
plots displayed in the PScope window. Additional
information and help for
PScope
is available in the
DC718 Quick Start Guide and in the online help
available within the
PScope
program itself.
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