74ALVCH16827
Rev. 3 — 6 April 2018
20-bit buffer/line driver, non-inverting; 3-state
Product data sheet
1
General description
The 74ALVCH16827 is a 20-bit non-inverting buffer/driver with 3-state outputs for bus
oriented applications.
The 74ALVCH16827 consists of two 10-bit sections with separate output enable signals.
For either 10-bit buffer section, the two output enable (1OE0 and 1OE1 or 2OE0 and
2OE1) inputs must both be active. If either output enable input is high, the outputs of that
10-bit buffer section are in high impedance state.
The 74ALVCH16827 has active bus hold circuitry which is provided to hold unused or
floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
2
Features and benefits
•
•
•
•
•
•
•
•
•
Wide supply voltage range of 1.2V to 3.6V
CMOS low power consumption
MultiByte flow-through standard pin-out architecture
Low inductance multiple V
CC
and GND pins for minimum noise and ground bounce
Direct interface with TTL levels (2.7 V to 3.6 V)
Bus hold on data inputs
Output drive capability 50 Ω transmission lines at 85 °C
Current drive ±24 mA at 3.0 V
Complies with JEDEC standards:
–
JESD8-5 (2.3 V to 2.7 V)
–
JESD8B/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
–
HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
–
CDM JESD22-C101E exceeds 1000 V
3
Ordering information
Package
Temperature
range
Name
Description
plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
Version
SOT364-1
Table 1. Ordering information
Type number
74ALVCH16827DGG −40 °C to +85 °C TSSOP56
Nexperia
20-bit buffer/line driver, non-inverting; 3-state
74ALVCH16827
4
Functional diagram
1
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
&
&
EN1
EN2
1
1
2
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
27
55
54
52
51
49
48
47
45
44
43
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9
1
56
1OE0
1OE1
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9
2
42
3
41
5
40
6
38
8
37
9
36
10
34
12
33
13
31
14
30
1
2
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9
28
29
2OE0
2OE1
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9
15
16
17
19
20
21
23
24
26
27
001aad056
001aad055
Figure 1. Logic symbol
nA0
nA1
nA2
nA3
nA4
nA5
Figure 2. IEC logic symbol
nA6
nA7
nA8
nA9
nOE0
nOE1
nY0
nY1
nY2
nY3
nY4
nY5
nY6
nY7
nY8
nY9
001aad061
Figure 3. Logic diagram
V
CC
data input
to internal circuit
001aal733
Figure 4. Bus hold circuit
74ALVCH16827
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
2 / 13
Nexperia
20-bit buffer/line driver, non-inverting; 3-state
74ALVCH16827
5
Pinning information
5.1 Pinning
74ALVCH16827
1OE0
1Y0
1Y1
GND
1Y2
1Y3
V
CC
1Y4
1Y5
1
2
3
4
5
6
7
8
9
56 1OE1
55 1A0
54 1A1
53 GND
52 1A2
51 1A3
50 V
CC
49 1A4
48 1A5
47 1A6
46 GND
45 1A7
44 1A8
43 1A9
42 2A0
41 2A1
40 2A2
39 GND
38 2A3
37 2A4
36 2A5
35 V
CC
34 2A6
33 2A7
32 GND
31 2A8
30 2A9
29 2OE1
aaa-028397
1Y6 10
GND 11
1Y7 12
1Y8 13
1Y9 14
2Y0 15
2Y1 16
2Y2 17
GND 18
2Y3 19
2Y4 20
2Y5 21
V
CC
22
2Y6 23
2Y7 24
GND 25
2Y8 26
2Y9 27
2OE0 28
Figure 5. Pin configuration SOT364-1 (TSSOP56)
74ALVCH16827
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
3 / 13
Nexperia
20-bit buffer/line driver, non-inverting; 3-state
74ALVCH16827
5.2 Pin description
Table 2. Pin description
Symbol
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7, 1A8, 1A9
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7, 2A8, 2A9
1Y0, 1Y1, 1Y2, 1Y3, 1Y4, 1Y5, 1Y6, 1Y7, 1Y8, 1Y9
2Y0, 2Y1, 2Y2, 2Y3, 2Y4, 2Y5, 2Y6, 2Y7, 2Y8, 2Y9
1OE0, 1OE1, 2OE0, 2OE1
GND
V
CC
Pin
55, 54, 52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
2, 3, 5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
1, 56, 28, 29
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
Description
data input
data input
data output
data output
output enable inputs
(active-LOW)
ground (0 V)
positive voltage
supply
6
Functional description
[1]
Table 3. Function table
Operating mode
transparent
transparent
High-impedance
Input
nOEn
L
L
H
nAn
L
H
X
Output
nYn
L
H
Z
[1] X = don’t care; Z = High-impedance OFF-state; H = HIGH voltage level; L = LOW voltage level.
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O (sink/source)
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output sink or source current
supply current
ground current
storage temperature
total power dissipation
T
amb
= −40 °C to +85 °C
[2]
Conditions
data inputs
control inputs
V
I
< 0 V
V
O
> V
CC
or V
O
< 0 V
V
O
= 0 V to V
CC
[1]
[1]
[1]
Min
-0.5
-0.5
-0.5
-0.5
-50
-
-
-
-100
−65
-
Max
+4.6
V
CC
+ 0.5
+4.6
V
CC
+ 0.5
-
±50
±50
100
-
+150
600
Unit
V
V
V
V
mA
mA
mA
mA
mA
°C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP56 packages: above 55 °C derate linearly with 8 mW/K.
74ALVCH16827
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
4 / 13
Nexperia
20-bit buffer/line driver, non-inverting; 3-state
74ALVCH16827
8
Recommended operating conditions
Conditions
V
CC
= 2.5 V:
for maximum speed performance at C
L
= 30 pF
V
CC
= 3.3 V:
for maximum speed performance at C
L
= 50 pF
Min
2.3
3.0
0
0
in free air
V
CC
= 2.3 V to 3.0 V
V
CC
= 3.0 V to 3.6 V
−40
0
0
Max
2.7
3.6
V
CC
V
CC
+85
20
10
Unit
V
V
V
V
°C
ns/V
ns/V
Table 5. Recommended operating conditions
Symbol Parameter
V
CC
supply voltage
V
I
V
O
T
amb
Δt/ΔV
input voltage
output voltage
ambient temperature
input transition rise and
fall rate
9
Static characteristics
Table 6. Static characteristics
At recommended operating conditions. T
amb
= −40 °C to +85 °C; Voltages are referenced to GND (ground = 0 V).
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH-level input
voltage
LOW-level input
voltage
HIGH-level output
voltage
Conditions
V
CC
= 2.3 to 2.7 V
V
CC
= 2.7 to 3.6 V
V
CC
= 2.3 to 2.7 V
V
CC
= 2.7 to 3.6 V
V
I
= V
IH
or V
IL
I
O
= -100 μA; V
CC
= 2.3 V to 3.6 V
I
O
= -6 mA; V
CC
= 2.3 V
I
O
= -12 mA; V
CC
= 2.3 V
I
O
= -12 mA; V
CC
= 2.7 V
I
O
= -12 mA; V
CC
= 3.0 V
I
O
= -24 mA; V
CC
= 3.0 V
V
OL
LOW-level output
voltage
V
I
= V
IH
or V
IL
I
O
= 100 μA; V
CC
= 2.3 V to 3.6 V
I
O
= 6 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
I
I
BHL
I
BHH
input leakage current V
I
= V
CC
or GND; V
CC
= 2.3 V to 3.6 V
bus hold LOW
current
bus hold HIGH
current
V
CC
= 2.3 V; V
I
= 0.7 V
V
CC
= 3.0 V; V
I
= 0.8 V
V
CC
= 2.3 V; V
I
= 1.7 V
V
CC
= 3.0 V; V
I
= 2.0 V
All information provided in this document is subject to legal disclaimers.
Min
1.7
2.0
-
-
V
CC
- 0.2
V
CC
- 0.3
V
CC
- 0.6
V
CC
- 0.5
V
CC
- 0.6
V
CC
- 1.0
-
-
-
-
-
-
45
75
-45
-75
Typ
[1]
Max
-
-
0.7
0.8
-
-
-
-
-
-
0.20
0.40
0.70
0.40
0.55
5
-
-
-
-
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
μA
μA
μA
μA
μA
1.2
1.5
1.2
1.5
V
CC
V
CC
- 0.08
V
CC
- 0.26
V
CC
- 0.14
V
CC
- 0.09
V
CC
- 0.28
GND
0.07
0.15
0.14
0.27
0.1
-
150
-
-175
74ALVCH16827
© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
5 / 13
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