dsPIC33EP128GS806-E/PT datasheet, PDF

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dsPIC33EP128GS806-E/PT: DescriptionDigital signal processors and controllers-DSP, DSC 16-bit DSC 70MIPS 128KBFlash 8KBRAMCAN; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，481 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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dsPIC33EP128GS806-E/PT Overview

Digital signal processors and controllers-DSP, DSC 16-bit DSC 70MIPS 128KBFlash 8KBRAMCAN

dsPIC33EP128GS806-E/PT Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	TFQFP, TQFP64,.47SQ
Reach Compliance Code	compliant
Factory Lead Time	5 weeks
Has ADC	YES
Address bus width
barrel shifter	YES
bit size	16
boundary scan	YES
maximum clock frequency	60 MHz
DAC channel	YES
DMA channel	YES
External data bus width
Format	FIXED-POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PQFP-G64
JESD-609 code	e3
length	10 mm
low power mode	YES
Number of DMA channels	4
Number of external interrupt devices	4
Number of I/O lines	51
Number of serial I/Os	4
Number of terminals	64
Number of timers	7
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	TFQFP
Encapsulate equivalent code	TQFP64,.47SQ
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE, FINE PITCH
RAM (bytes)	8192
RAM (number of words)	8192
rom(word)	131072
ROM programmability	FLASH
Filter level	AEC-Q100; TS 16949
Maximum seat height	1.2 mm
Maximum slew rate	42 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
width	10 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER

User Manual

AN3399 - AN3399, Safeguarding Flash Memory Self-Write Operations

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dsPIC33EPXXXGS70X/80X FAMILY

16-Bit Digital Signal Controllers for Digital Power Applications with

Interconnected High-Speed PWM, ADC, PGA and Comparators

Operating Conditions

• 3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS

• 3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS

Advanced Analog Features

• High-Speed ADC module:

- 12-bit with 4 dedicated SAR ADC cores and

one shared SAR ADC core

- Configurable resolution (up to 12-bit) for each

ADC core

- Up to 3.25 Msps conversion rate per channel

at 12-bit resolution

- 11 to 22 single-ended inputs

- Dedicated result buffer for each analog channel

- Flexible and independent ADC trigger sources

- Two digital comparators

- Two oversampling filters for increased

resolution

• Four Rail-to-Rail Comparators with Hysteresis:

- Dedicated 12-bit Digital-to-Analog Converter

(DAC) for each analog comparator

- Up to two DAC reference outputs

- Up to two external reference inputs

• Two Programmable Gain Amplifiers:

- Single-ended or independent ground reference

- Five selectable gains (4x, 8x, 16x, 32x and 64x)

- 40 MHz gain bandwidth

Flash Architecture

• Dual Partition Flash Program Memory with

Live Update:

- Supports programming while operating

- Supports partition soft swap

Core: 16-Bit dsPIC33E CPU

•

Code-Efficient (C and Assembly) Architecture

Two 40-Bit Wide Accumulators

Single-Cycle (MAC/MPY) with Dual Data Fetch

Single-Cycle Mixed-Sign MUL plus

Hardware Divide

• 32-Bit Multiply Support

• Four Additional Working Register Sets (reduces

context switching)

Clock Management

•

±0.9% Internal Oscillator

Programmable PLLs and Oscillator Clock Sources

Fail-Safe Clock Monitor (FSCM)

Independent Watchdog Timer (WDT)

Fast Wake-up and Start-up

Interconnected SMPS Peripherals

• Reduces CPU Interaction to Improve Performance

• Flexible PWM Trigger Options for

ADC Conversions

• High-Speed Comparator Truncates PWM

(15 ns typical):

- Supports Cycle-by-Cycle Current mode control

- Current Reset mode (variable frequency)

Power Management

• Low-Power Management modes (Sleep,

Idle, Doze)

• Integrated Power-on Reset and Brown-out Reset

• 0.5 mA/MHz Dynamic Current (typical)

• 20

μA

Current (typical)

High-Speed PWM

• Eight PWM Generators (two outputs per generator)

• Individual Time Base and Duty Cycle for each PWM

• 1.04 ns PWM Resolution (frequency, duty cycle,

dead time and phase)

• Supports Center-Aligned, Redundant, Complementary

and True Independent Output modes

• Independent Fault and Current-Limit Inputs

• Output Override Control

• PWM Support for AC/DC, DC/DC, Inverters, PFC

and Lighting

Timers/Output Compare/Input Capture

• Five 16-Bit and up to Two 32-Bit Timers/Counters

• Four Output Compare (OC) modules, Configurable

as Timers/Counters

• Four Input Capture (IC) modules



2016-2017 Microchip Technology Inc.

DS70005258B-page 1

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