STGAP2D
Galvanically isolated 4 A half-bridge gate driver
Datasheet - production data
Description
The STGAP2D is a half-bridge gate driver which
isolates the gate driving channels from the low
voltage control and interface circuitry.
SO-16
The gate driver is characterized by 4 A capability
and rail-to-rail outputs, making the device also
suitable for high power inverter applications such
as motor drivers in industrial applications.
The device integrates protection functions:
dedicated SD and BRAKE pins are available,
UVLO and thermal shutdown are included to
easily design high reliability systems, and the
interlocking function prevents outputs from being
high at the same time.
The input to output propagation delay results are
contained within 80 ns, providing high PWM
control accuracy.
A standby mode is available in order to reduce
idle power consumption.
Features
1700 V dual channel gate driver
Driver current capability: 4 A sink / source at
25 °C
dV/dt transient immunity ± 100 V/ns
Overall input-output propagation delay: 80 ns
UVLO function
Interlocking function
Dedicated SD and BRAKE pins
Gate driving voltage up to 26 V
3.3 V, 5 V TTL/CMOS inputs with hysteresis
Temperature shutdown protection
Standby function
Applications
Motor driver for industrial drives, factory
automation, home appliances and fans.
600/1200 V inverters
Battery chargers
Induction heating
Welding
UPS
Power supply units
DC-DC converters
Power Factor Correction
DS12746 Rev 1
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
1/21
www.st.com
Contents
STGAP2D
Contents
1
2
3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description and connection diagram . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
3.2
3.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1
5.2
5.3
5.4
5.5
5.6
Gate driving power supply and UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Power-up, power-down and 'safe state' . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal shutdown protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Standby function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
7
Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1
7.2
Layout guidelines and considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8
9
10
11
Testing and characterization information . . . . . . . . . . . . . . . . . . . . . . . 16
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
DS12746 Rev 1
STGAP2D
Contents
12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DS12746 Rev 1
3/21
21
Block diagram
STGAP2D
1
Block diagram
Figure 1. Block diagram
VDD
VH_A
INA
UVLO
VH
Floating
Section
Control
Logic
Level
Shifter
GOUT_A
INB
I
S
O
L
A
T
I
O
N
GNDISO_A
Floating g
round A
SD
Control
Logic
VH_B
BRAKE
UVLO
VH
VDD2
Floating
Section
Control
Logic
Level
Shifter
GOUT_B
GND
Floating g
round B
GNDISO_B
4/21
DS12746 Rev 1
STGAP2D
Pin description and connection diagram
2
Pin description and connection diagram
Figure 2. Pin connection (top view)
Table 1. Pin description
Pin #
1
2
3
4
5
6
7
9
10
11
14
15
16
Others
Pin Name
VDD
INA
INB
SD
BRAKE
VDD2
GND
VH_B
GOUT_B
GNDISO_B
VH_A
GOUT_A
GNDISO_A
Type
Power supply
Logic input
Logic input
Logic input
Logic input
Power supply
Power supply
Power supply
Analog output
Power supply
Power supply
Analog output
Power supply
Function
Control logic supply voltage.
Control logic input for Channel A, active
high.
Control logic input for Channel B, active
high.
Shutdown input, active low.
Control logic input, active low.
Must be connected to VDD.
Control logic ground.
Channel B gate driving positive supply.
Channel B Sink/Source output.
Channel B gate driving isolated ground.
Channel A gate driving positive supply.
Channel A Sink/Source output.
Channel A gate driving isolated ground.
Not connected.
DS12746 Rev 1
5/21
21
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