S71NS-N MCP Products
MirrorBit
TM
1.8 Volt-only Simultaneous Read/Write,
Burst-mode Multiplexed Flash Memory:
256 Mb (16 Mb x 16-bit), 128 Mb (8 Mb x 16-bit) and
64 Mb (4 Mb x 16-bit) with Burst-mode Multiplexed
pSRAM: 64 Mb (4 Mb x 16-bit), 32 Mb (2 Mb x 16-bit)
and 16 Mb (1 Mb x 16-bit)
Data Sheet
ADVANCE
INFORMATION
Notice to Readers:
The Advance Information status indicates that this
document contains information on one or more products under development
at Spansion Inc. The information is intended to help you evaluate this product.
Do not design in this product without contacting the factory. Spansion Inc.
reserves the right to change or discontinue work on this proposed product
without notice.
Publication Number
S71NS-N_00
Revision
A
Amendment
3
Issue Date
October 10, 2006
A d v a n c e
I n f o r m a t i o n
Notice On Data Sheet Designations
Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise
readers of product information or intended specifications throughout the product life cycle, in-
cluding development, qualification, initial production, and full production. In all cases, however,
readers are encouraged to verify that they have the latest information before finalizing their de-
sign. The following descriptions of Spansion data sheet designations are presented here to high-
light their presence and definitions.
Advance Information
The Advance Information designation indicates that Spansion Inc. is developing one or more
specific products, but has not committed any design to production. Information presented in a
document with this designation is likely to change, and in some cases, development on the prod-
uct may discontinue. Spansion Inc. therefore places the following conditions upon Advance Infor-
mation content:
“This document contains information on one or more products under development at Spansion Inc. The
information is intended to help you evaluate this product. Do not design in this product without con-
tacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed
product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a
commitment to production has taken place. This designation covers several aspects of the prod-
uct life cycle, including product qualification, initial production, and the subsequent phases in the
manufacturing process that occur before full production is achieved. Changes to the technical
specifications presented in a Preliminary document should be expected while keeping these as-
pects of production under consideration. Spansion places the following conditions upon Prelimi-
nary content:
“This document states the current technical specifications regarding the Spansion product(s) described
herein. The Preliminary status of this document indicates that product qualification has been completed,
and that initial production has begun. Due to the phases of the manufacturing process that require
maintaining efficiency and quality, this document may be revised by subsequent versions or modifica-
tions due to changes in technical specifications.”
Combination
Some data sheets will contain a combination of products with different designations (Advance In-
formation, Preliminary, or Full Production). This type of document will distinguish these products
and their designations wherever necessary, typically on the first page, the ordering information
page, and pages with DC Characteristics table and AC Erase and Program table (in the table
notes). The disclaimer on the first page refers the reader to the notice on this page.
Full Production (No Designation on Document)
When a product has been in production for a period of time such that no changes or only nominal
changes are expected, the Preliminary designation is removed from the data sheet. Nominal
changes may include those affecting the number of ordering part numbers available, such as the
addition or deletion of a speed option, temperature range, package type, or V
IO
range. Changes
may also include those needed to clarify a description or to correct a typographical error or incor-
rect specification. Spansion Inc. applies the following conditions to documents in this category:
“This document states the current technical specifications regarding the Spansion product(s) described
herein. Spansion Inc. deems the products to have been in sufficient production volume such that sub-
sequent versions of this document are not expected to change. However, typographical or specification
corrections, or modifications to the valid combinations offered may occur.”
Questions regarding these document designations may be directed to your local AMD or Fujitsu
sales office.
ii
S71NS-N_00_A3 October 10, 2006
S71NS-N MCP Products
MirrorBit
TM
1.8 Volt-only Simultaneous Read/Write,
Burst-mode Multiplexed Flash Memory:
256 Mb (16 Mb x 16-bit), 128 Mb (8 Mb x 16-bit) and
64 Mb (4 Mb x 16-bit) with Burst-mode Multiplexed
pSRAM: 64 Mb (4 Mb x 16-bit), 32 Mb (2 Mb x 16-bit)
and 16 Mb (1 Mb x 16-bit)
ADVANCE
INFORMATION
General Description
The S71NS-N Series is a product line of stacked Multi-Chip Product (MCP) packages and consists
of the following items:
One or more S29NS-N flash memory die
Mux burst-mode pSRAM
The products covered by this document are listed in the table below. For details about their spec-
ifications, please refer to their individual datasheet for further details.
pSRAM
Density
64 Mb
Flash
128 Mb
256 Mb
16 Mb
S71NS064NA0
S71NS128NA0
S71NS128NB0
S71NS256NB0
S71NS128NC0
S71NS256NC0
32 Mb
64 Mb
Distinctive Characteristics
MCP Features
Power supply voltage of 1.7 V to 1.95 V
Burst Speed: 66 MHz
Package - MCP BGA: 0.5 mm ball pitch
— 8.0 x 9.2 mm, 56 ball for NS064N and NS128N based MCPs
— 10.0 x 11.0 mm, 60 ball for NS256N based MCPs
Operating Temperature
— Wireless, –25°C to +85°C
For detailed specifications, please refer to the individual data sheets:
Document
S29NS-N
16 M Multiplexed pSRAM Type 2
16 M Multiplexed pSRAM Type 3
32 M Multiplexed pSRAM Type 3
64 M Multiplexed pSRAM Type 3
Publication Identification Number
S29NS-N_00
muxpsram_05
muxpsram_03
muxpsram_04
muxpsram_01
Publication Number
S71NS-N_00
Revision
A
Amendment
3
Issue Date
October 10, 2006
A d v a n c e
I n f o r m a t i o n
1
Ordering Information
The ordering part number is formed by a valid combination of the following:
S71NS
128
N
C
0
BJ
W
R
N
0
Packing
0
=
2
=
3
=
Type
Tray
7-inch Tape and Reel
13-inch Tape and Reel
RAM Supplier and Speed Combinations
N
= pSRAM Type 3, 70 ns, 66 MHz
T
= pSRAM Type 2, 70 ns, 66 MHz
Package Modifier
R
= 1.2 mm, 8.0 x 9.2, 56-ball VFBGA
V
= 1.2 mm, 11 x 10 mm, 60-ball VFBGA
Temperature Range
W
= Wireless (-25°C to +85°C)
Package Type
BJ
= Very Thin Fine-Pitch Ball Grid Array (VFBGA)
Lead (Pb)-free Package (LF35)
Chip Contents—2
No content
pSRAM Density
C = 64 Mb
B = 32 Mb
A = 16 Mb
Process Technology
N
= 110 nm MirrorBit Technology
Flash
256
128
064
Density
= 256 Mb
= 128 Mb
= 64 Mb
Device Family
S71NS = Multi-Chip Product
1.8 Volt-only Simultaneous Read/Write Burst Mode
Multiplexed Flash Memory + pSRAM
Table 1.1
Base Ordering Part
Number (Note 2)
S71NS064NA0
S71NS128NA0
S71NS128NB0
S71NS128NC0
S71NS256NB0
S71NS256NC0
BJW
Package &
Temperature
MCP Configurations and Valid Combinations
Model
Number
RT
RN
RN
RN
RN
VN
VN
0, 1, 2
Packing
Type
pSRAM Type
pSRAM Type 2
pSRAM Type 3
pSRAM Type 3
pSRAM Type 3
pSRAM Type 3
pSRAM Type 3
pSRAM Type 3
Flash Speed
Options
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
pSRAM Speed
Options
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
66 MHz
Package Marking Note:
The package marking omits the leading
S
from the ordering part number.
Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult
your local sales office to confirm availability of specific valid combinations and to check on newly
released combinations.
2
S71NS-N MCP Products
S71NS-N_00_A3 October 10, 2006
A d v a n c e
I n f o r m a t i o n
2
Input/Output Descriptions
Table 2.1
identifies the input and output package connections provided on the device.
Table 2.1
Symbol
AMAX – A16
ADQ15 – ADQ0
OE#
WE#
V
SS
NC
RDY
CLK
Address inputs
Multiplexed Address/Data
Input/Output Descriptions
Description
Flash
X
X
X
X
X
X
X
X
RAM
X
X
X
X
X
X
X
X
Output Enable input. Asynchronous relative to CLK for the Burst mode.
Write Enable input.
Ground
No Connect; not connected internally
Ready output. Indicates the status of the Burst read. The WAIT# pin of the
pSRAM is tied to RDY.
Clock input. In burst mode, after the initial word is output, subsequent
active edges of CLK increment the internal address counter. Should be at
V
IL
or V
IH
while in asynchronous mode
Address Valid input. Indicates to device that the valid address is present
on the address inputs.
Low = for asynchronous mode, indicates valid address; for burst mode,
causes starting address to be latched.
High = device ignores address inputs
Hardware reset input. Low = device resets and returns to reading array
data
Hardware write protect input. At V
IL
, disables program and erase functions
in the four outermost sectors. Should be at V
IH
for all other conditions.
Accelerated input. At V
HH
, accelerates programming; automatically places
device in unlock bypass mode. At V
IL
, disables all program and erase
functions. Should be at V
IH
for all other conditions.
Chip-enable input for pSRAM.
Chip-enable input for Flash. Asynchronous relative to CLK for Burst Mode.
Control Register Enable (pSRAM).
Flash 1.8 Volt-only single power supply.
pSRAM Power Supply.
Upper Byte Control (pSRAM).
Lower Byte Control (pSRAM)
Do Not Use
AVD#
X
X
F-RST#
F-WP#
F-ACC
R-CE1#
F-CE#
R-CRE
F-VCC
R-VCC
R-UB#
R-LB#
DNU
X
X
X
X
X
X
X
X
X
X
October 10, 2006 S71NS-N_00_A3
S71NS-N MCP Products
3
Embedded System
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