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About Cypress
Cypress is the leader in advanced embedded system solutions for the world's most innovative
automotive, industrial, smart home appliances, consumer electronics and medical products.
Cypress' microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable,
high-performance memories help engineers design differentiated products and get them to market
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www.cypress.com.
MB9A130LB Series
32-bit ARM
®
Cortex
®
-M3
FM3 Microcontroller
The MB9A130LB Series are highly integrated 32-bit microcontrollers that dedicated for embedded controllers with low-power
consumption mode and competitive cost.
The MB9A130LB Series are based on the ARM
®
Cortex
®
-M3 Processor with on-chip Flash memory and SRAM, and has peripheral
functions such as Motor Control Timers, ADCs and Communication Interfaces (UART, CSIO, I
2
C).
The products which are described in this data sheet are placed into TYPE3 product categories in FM3 Family Peripheral Manual.
Features
32-bit ARM
®
Cortex
®
-M3 Core
Processor version: r2p1
Up to 20 MHz Operation Frequency
Integrated Nested Vectored Interrupt Controller (NVIC): 1
channel NMI (non-maskable interrupt) and
32 channels' peripheral interrupts and 8 priority levels
management
[CSIO]
Full-duplex double buffer
Built-in dedicated baud rate generator
Overrun error detection function available
[I
2
C]
Standard-mode (Max 100 kbps) / Fast-mode (Max 400 kbps)
supported
24-bit System timer (Sys Tick): System timer for OS task
On-chip Memories
[Flash memory]
Up to 128 Kbytes
Read cycle: 0 wait-cycle
Security function for code protection
[SRAM]
This series contains 8 Kbyte on-chip SRAM that is connected
to System bus of Cortex-M3 core.
A/D Converter (Max 8 channels)
[12-bit A/D Converter]
Successive Approximation type
Conversion time: Min. 1.0 μs
Priority conversion available (priority at 2 levels)
Scanning conversion mode
Built-in FIFO for conversion data storage (for SCAN
conversion: 16 steps, for Priority conversion:
4 steps)
SRAM1: 8 Kbytes
Multi-function Serial Interface (Max 8 channels)
Operation mode is selectable from the followings for each
channel.
Base Timer (Max 8 channels)
Operation mode is selectable from the followings for each
channel.
16-bit PWM timer
16-bit PPG timer
16-/32-bit reload timer
16-/32-bit PWC timer
UART
CSIO
I
2
C
[UART]
Full-duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Various error detection functions available (parity errors,
framing errors, and overrun errors)
Cypress Semiconductor Corporation
Document Number: 002-05671 Rev.*C
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised September 14, 2017
MB9A130LB Series
General Purpose I/O Port
This series can use its pins as general purpose I/O ports when
they are not used for peripherals. Moreover, the port relocate
function is built in. It can set which I/O port the peripheral
function can be allocated.
Watchdog Timer (2 channels)
A watchdog timer can generate interrupts or a reset when a
time-out value is reached.
This series consists of two different watchdogs, a Hardware
watchdog and a Software watchdog.
Hardware watchdog timer is clocked by built-in Low-speed CR
oscillator. Therefore, Hardware watchdog is active in any low
power consumption mode except RTC and Stop and Deep
Standby RTC and Deep Standby Stop modes.
Capable of pull-up control per pin
Capable of reading pin level directly
Built-in the port relocate function
Up to 52 fast general purpose I/O Ports@64 pin Package
Some pins are 5V tolerant I/O
See List of Pin Functions and I/O Circuit Type to confirm the
corresponding pins.
Clock and Reset
[Clocks]
Five clock sources (2 external oscillators, 2 built-in CR
oscillators, and Main PLL) that are dynamically selectable.
Multi-function Timer
The Multi-function timer is composed of the following blocks.
Main Clock:
Sub Clock:
4 MHz to 20 MHz
32.768 kHz
16-bit free-run timer × 3 ch.
Input capture × 4 ch.
Output compare × 6 ch.
A/D activation compare × 1 ch.
Waveform generator × 3 ch.
16-bit PPG timer × 3 ch.
The following function can be used to achieve the motor
control.
Built-in High-speed CR Clock: 4 MHz
Built-in Low-speed CR Clock: 100 kHz
Main PLL Clock
[Resets]
Reset requests from INITX pin
Power on reset
Software reset
Watchdog timers reset
Low voltage detector reset
Clock supervisor reset
Clock Super Visor (CSV)
Clocks generated by built-in CR oscillators are used to
supervise abnormality of the external clocks.
PWM signal output function
DC chopper waveform output function
Dead time function
Input capture function
A/D convertor activate function
DTIF (Motor emergency stop) interrupt function
Real-time clock (RTC)
The Real-time clock can count
Year/Month/Day/Hour/Minute/Second/A day of the week from
00 to 99.
If external clock failure (clock stop) is detected, reset is
asserted.
If external frequency anomaly is detected, interrupt or reset
is asserted.
Interrupt function with specifying date and time
(Year/Month/Day/Hour/Minute) is available. This function is
also available by specifying only Year, Month, Day, Hour or
Minute.
Low Voltage Detector (LVD)
This Series include 2-stage monitoring of voltage on the VCC.
When the voltage falls below the voltage has been set, Low
Voltage Detector generates an interrupt or reset.
Timer interrupt function after set time or each set time.
Capable of rewriting the time with continuing the time count.
Leap year automatic count is available.
External Interrupt Controller Unit
Up to 8 external interrupt input pins
Include one non-maskable interrupt (NMI) input pin
LVD1: error reporting via interrupt
LVD2: auto-reset operation
Document Number: 002-05671 Rev.*C
Page 2 of 86
MB9A130LB Series
Low Power Consumption Mode
Six low power consumption modes supported.
Debug
Serial Wire JTAG Debug Port (SWJ-DP)
Sleep
Timer
RTC
Stop
Deep Standby RTC
Deep Standby Stop
Back up register is 16 bytes.
Power Supply
Wide range voltage: VCC = 1.8 V to 5.5 V
Document Number: 002-05671 Rev.*C
Page 3 of 86
MB9A130LB Series
Contents
1. Product Lineup .................................................................................................................................................................. 6
2. Packages ........................................................................................................................................................................... 7
3. Pin Assignment ................................................................................................................................................................. 8
4. List of Pin Functions....................................................................................................................................................... 12
5. I/O Circuit Type................................................................................................................................................................ 25
6. Handling Precautions ..................................................................................................................................................... 30
6.1
Precautions for Product Design ................................................................................................................................... 30
6.2
Precautions for Package Mounting .............................................................................................................................. 31
6.3
Precautions for Use Environment ................................................................................................................................ 32
7. Handling Devices ............................................................................................................................................................ 33
8. Block Diagram ................................................................................................................................................................. 35
9. Memory Size .................................................................................................................................................................... 36
10. Memory Map .................................................................................................................................................................... 36
11. Pin Status in Each CPU State ........................................................................................................................................ 39
12. Electrical Characteristics ............................................................................................................................................... 45
12.1 Absolute Maximum Ratings ......................................................................................................................................... 45
12.2 Recommended Operating Conditions.......................................................................................................................... 46
12.3 DC Characteristics....................................................................................................................................................... 47
12.3.1 Current Rating .............................................................................................................................................................. 47
12.3.2 Pin Characteristics ....................................................................................................................................................... 50
12.4 AC Characteristics ....................................................................................................................................................... 51
12.4.1 Main Clock Input Characteristics .................................................................................................................................. 51
12.4.2 Sub Clock Input Characteristics ................................................................................................................................... 52
12.4.3 Built-in CR Oscillation Characteristics .......................................................................................................................... 52
12.4.4 Operating Conditions of Main PLL (In the case of using main clock for input of PLL) .................................................. 53
12.4.5 Operating Conditions of Main PLL (In the case of using built-in High-speed CR clock for input clock of Main PLL) .... 53
12.4.6 Reset Input Characteristics .......................................................................................................................................... 54
12.4.7 Power-on Reset Timing................................................................................................................................................ 54
12.4.8 Base Timer Input Timing .............................................................................................................................................. 55
12.4.9 CSIO/UART Timing ...................................................................................................................................................... 56
12.4.10 External Input Timing ................................................................................................................................................ 64
12.4.11 I
2
C Timing ................................................................................................................................................................. 65
12.4.12 JTAG Timing ............................................................................................................................................................. 66
12.5 12-bit A/D Converter .................................................................................................................................................... 67
12.6 Low-Voltage Detection Characteristics ........................................................................................................................ 70
12.6.1 Low-Voltage Detection Reset ....................................................................................................................................... 70
12.6.2 Interrupt of Low-voltage Detection ............................................................................................................................... 71
12.7 Flash Memory Write/Erase Characteristics ................................................................................................................. 73
12.7.1 Write / Erase time......................................................................................................................................................... 73
12.7.2 Write cycles and data hold time ................................................................................................................................... 73
12.8 Return Time from Low-Power Consumption Mode ...................................................................................................... 74
12.8.1 Return Factor: Interrupt/WKUP .................................................................................................................................... 74
12.8.2 Return Factor: Reset .................................................................................................................................................... 76
13. Ordering Information ...................................................................................................................................................... 78
14. Package Dimensions ...................................................................................................................................................... 79
15. Major Changes ................................................................................................................................................................ 84
Document Number: 002-05671 Rev.*C
Page 4 of 86
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