AR0833
AR0833 1/3.2‐Inch 8 Mp
CMOS Digital Image Sensor
Table 1. KEY PERFORMANCE PARAMETERS
Parameter
Array Format
Primary Modes
3264
×
2448
Full Resolution: 4:3
−
8 Mp at 30 fps
16:9
−
6 Mp at 30 fps
16:9
−
1080p HD at 30 fps
Pixel Size
Optical Format
Die Size
Input Clock Frequency
Interface
1.4
μm
Back Side Illuminated (BSI)
1/3.2-inch
6.86 mm
×
6.44 mm (Area: 44.17 mm
2
)
6−27 MHz
MIPI CSI−2 (2−, 3−, 4−lane Modes
Supported.) 800 Mbps Max MIPI Clock
Speed per Lane.
X
−
Bin2, Sum2 Skip: 2×, 4×
Y
−
Sum2, Skip: 2×, 4×, 8×
Output Data Depth
Analog Gain
High Quality Bayer Scalar
Temperature Sensor
VCM AF Driver
3−D Support
Supply Voltage
Analog
Digital
Pixel
OTPM
Read
I/O
MIPI
Power Consumption
Responsivity
SNR
MAX
Dynamic Range
Operating Temperature Range
(at Junction)
−T
J
10 bits Raw or 8/6−bit DPCM
1×, 2×, 3×, 4×, 6×, 8×
Adjustable Scaling Up to 1/6x scaling
10-bit, Single Instance on Chip,
Controlled by Two-wire Serial I/F
8-bit Resolution With Slew Rate Control
Frame Rate and Exposure
Synchronization
2.5−3.1 V (2.8 V Nominal)
1.14−1.3 V (1.2 V Nominal)
2.5−3.1 V (2.8 V Nominal)
1.7−1.9 V (1.8 V Nominal)
1.7−1.9 V (1.8 V Nominal) or
2.5−3.1 V (2.8 V Nominal)
1.14−1.3 V (1.2 V Nominal)
340 mW at 30 fps, 8 Mp
0.6 V/lux-sec
36 dB
64 dB
−30°C
to +70°C
CLCC48 10
y
10
CASE 848AJ
Typical Value
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ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Subsampling Modes
Features
(Continued)
•
Data Interfaces: Two-, Three-, and Four-lane
•
•
•
•
•
•
•
•
Features
•
High-speed Sensor Supporting 8 Mp (4:3) 30 fps Still Images and
Full HD 1080p30 Video
•
1.4
μ
Pixel with ON Semiconductor A-PixHS™ Technology
Providing Best-in-class Low-light Performance.
•
Optional On-chip high-quality Bayer Scaler to Resize Image to
Desired Size
•
•
Serial Mobile Industry Processor Interface
(MIPI)
Bit-depth Compression Available for MIPI
Interface: 10-8 and 10-6 to Enable Lower
Bandwidth Receivers for Full Frame Rate
Applications
On-chip Temperature Sensor
On-die phase-locked Loop (PLL) Oscillator
5.6 Kb One-time Programmable Memory
(OTPM) for Storing Module Information
On-chip 8-bit VCM Driver
3D Synchronization Controls to Enable
Stereo Video Capture
Interlaced Multi-exposure Readout Enabling
High Dynamic Range (HDR) Still and Video
Applications
Programmable Controls: Gain, Horizontal
and Vertical Blanking, Auto Black Level
Offset Correction, Frame Size/rate, Expo-
sure, Left–right and Top–bottom Image Re-
versal, Window Size, and Panning
Support for External Mechanical Shutter
Support for External LED or Xenon Flash
Applications
•
Smart phones
•
PC cameras
•
Tablets
Publication Order Number:
AR0833/D
©
Semiconductor Components Industries, LLC, 2011
June, 2018
−
Rev. 11
1
AR0833
Table 2. MODES OF OPERATION AND POWER CONSUMPTION AT 100% FOV
Active Readout
Window (Col
y
Row)
3264 x 2448
3264 x 1836
Sensor Output
Resolution
(Col
y
Row)
3264 x 2448
3265 x 1836
Power
Consumption
[mW] (Note 5)
340
323
Mode
SNAPSHOT MODE
Full Resolution 4:3
−
8 Mp (Note 1)
Full Resolution 16:9
−
6 Mp (Note 1)
4:3 VIDEO MODE
VGA (Note 2)
VGA (Note 3)
VGA
16:9 VIDEO MODE
1080p (Note 2)
1080p + EIS (Note 2, 4)
720p (Note 2)
720p (Note 2)
720p + EIS (Note 2)
WVGA (Note 2)
WVGA (Note 2)
1.
2.
3.
4.
5.
Mode
Full mode
Full mode
FPS
30
30
3264 x 2448
3264 x 2448
3264 x 2448
640 x 480
640 x 480
640 x 480
Scaling
Bin2 + Scaling
Bin2 + Scaling
30
30
60
293
270
293
3264 x 1836
3264 x 1836
3264 x 1836
3264 x 1836
3264 x 1836
3264 x 1836
3265 x 1836
1920 x 1080
2304 x 1296
1280 x 720
1280 x 720
1536 x 864
8546 x 480
856 x 480
Scaling
Scaling
Scaling
Bin2 + Scaling
Scaling
Scaling
Bin2 + Scaling
30
30
30
60
30
30
60
216
216
216
295
216
256
293
732 Mbps/lane MIPI data transfer rate
Scaled image using internal High Quality Bayer Scaler
Low power preview
Electronic Image Stabilization
Values measured at T = 25°C and nominal voltages
ORDERING INFORMATION
Table 3. AVAILABLE PART NUMBERS
Part Number
AR0833CS3C12SUAA0−DP
Product Description
8 MP 1/3″ CIS
Orderable Product Attribute Description
Dry Pack with Protective Film
See the ON Semiconductor Device Nomenclature
document (TND310/D) for a full description of the naming
convention used for image sensors. For reference
documentation, including information on evaluation kits,
please visit our web site at
www.onsemi.com.
GENERAL DESCRIPTION
The ON Semiconductor AR0833 is a 1/3.2-inch BSI
(back side illuminated) CMOS active-pixel digital image
sensor with a pixel array of 3264 (H) x 2448 (V) (3280 (H)
x 2464 (V) including border pixels). It incorporates
sophisticated on-chip camera functions such as mirroring,
column and row skip modes, and context switching for zero
shutter lag snapshot mode. It is programmable through a
simple two-wire serial interface and has very low power
consumption.
The AR0833 digital image sensor features ON
Semiconductor’s breakthrough low-noise 1.4
μm
pixel
CMOS imaging technology that achieves near-CCD image
quality (based on signal-to-noise ratio and low-light
sensitivity) while maintaining the inherent size, cost, and
integration advantages of CMOS.
The AR0833 sensor can generate full resolution image at
up to 30 frames per second (fps). An on-chip
analog-to-digital converter (ADC) generates a 10-bit value
for each pixel.
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2
AR0833
FUNCTIONAL OVERVIEW
In order to meet higher frame rates in AR0833 sensor, the
architecture has been re-designed. The analog core has a
column parallel architecture with 4 data paths. Digital block
has been re-architected to have 4 data paths.
V
AA
,
V
AA
_PIX
Row
Driver
Imaging Sensor Core
The chip is targeted to meet SMIA 85 module size. As a
result, the final die size is 6.86 mm x 6.44 mm (singulated)
which would fit in the intended module with two-sided pad
frame.
Figure 1 shows the block diagram of the AR0833.
Digital Processing
Data Calibration
Digital Gain
Image Output
FIFO&Optional
Compression
MIPI
Serial Data
Output [3:0]
Pixel
Array
Scaler
Gain
ADC
Test Pattern
Generator
V
DD
_IO,
DV
DD
_1V8,
DV
DD
_1V2
DV
DD
_1V2_
PHY
10-bit
Temperature
Sensor
Gain
Control
AR0833
PLL
Timing Control
VCM
Register Control
Two-wire
Serial Interface
XSHUTDOWN
GPIO[1:0]
GPI[3:2]
External
Clock
VCM
Control
Figure 1. Top Level Block Diagram
The core of the sensor is an 8 Mp active-pixel array. The
timing and control circuitry sequences through the rows of
the array, resetting and then reading each row in turn. In the
time interval between resetting a row and reading that row,
the pixels in the row integrate incident light. The exposure
is controlled by varying the time interval between reset and
readout. Once a row has been read, the data from the
columns is sequenced through an analog signal chain
(providing gain), and then through an ADC. The output from
the ADC is a 10-bit value for each pixel in the array. The
ADC output passes through a digital processing signal chain
(which provides further data path corrections and applies
digital gain).
The pixel array contains optically active and
light-shielded (“dark”) pixels. The dark pixels are used to
provide data for on-chip offset-correction algorithms
(“black level” control).
The sensor contains a set of control and status registers
that can be used to control many aspects of the sensor
behavior including the frame size, exposure, and gain
setting. These registers can be accessed through a two-wire
serial interface.
The output from the sensor is a Bayer pattern; alternate
rows are a sequence of either green and red pixels or blue and
green pixels. The offset and gain stages of the analog signal
chain provide per-color control of the pixel data.
A flash output signal is provided to allow an external
xenon or LED light source to synchronize with the sensor
exposure time. Additional I/O signals support the provision
of an external mechanical shutter.
Pixel Array
The sensor core uses a Bayer color pattern, as shown in
Figure 2. The even-numbered rows contain green and red
pixels; odd-numbered rows contain blue and green pixels.
Even-numbered columns contain red and green pixels;
odd-numbered columns contain blue and green pixels.
Column Readout Direction
…
Black Pixels
First Pixel
(Col. 0, Row 60)
Row Readout Direction
…
R
Gr
R
Gr
R
Gb
B
Gb
B
Gb
R
Gr
R
Gr
R
Gb
B
Gb
B
Gb
NOTE:
By default the mirror bit is set, so the
read-out direction is from left to right.
Figure 2. Pixel Color Pattern Detail
(Top Right Corner)
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3
S
DATA
S
CLK
MIPI
AR0833
TYPICAL CONNECTIONS
The chip supports MIPI output protocol. MIPI can be
configured in 4-, 3- or 2-lanes. There are no parallel data
output ports.
2.8 V or 1.8 V
1.8 V
1.2 V
2.8 V
1.2 V
1.5 kW
2, 3
1.5 kW
2
V
DD
_IO
(IO)
S
CLK
S
DATA
DV
DD
_1V8
(OTPM Read)
6
DV
DD
_1V2
(Digital)
7
V
AA4
(Analog)
(Pixel)
V
AA4
Two-wire
Serial
Interface
DV
DD
1V2_PHY
(MIPI)
7
DATA_P
DATA_N
DATA2_P
DATA2_N
DATA3_P
DATA3_N
DATA4_N
DATA4_P
CLK_P
GNDPHY
GND_IO
CLK_N
VCM
ISINK
A
GND
V
PP5
(OTPM Write)
(Only Connected while
Programming OTPM)
VCM
GND
To
MIPI
Port
EXTCLK
(6−27 MHz)
General
Purpose
Input/Output
GPIO[1:0]
GPI[3:2]
XSHUTDOWN
ATEST
8
TEST
8
D
GND
1
VCM
2.8 V
0.1
mF
0.1
mF
1.0
mF
1.0
mF
0.1
mF
0.1
mF
1.2 V
DV
DD
_1V8
V
DD
_IO
0.01
mF
Notes:
1. All power supplies should be adequately decoupled; recommended cap values are:
−
2.8 V: 1.0
mF,
0.1
mF,
and then 0.01
mF
−
1.2 V: 1
mF
and then 0.1
mF
−
1.8 V: 0.1
mF
2. Resistor value 1.5 kW is recommended, but may be greater for slower two-wire speed.
3. This pull-up resistor is not required if the controller drives a valid logic level on S
CLK
at all times.
4. V
AA
and V
AA
_PIX can be tied together. However, for noise immunity it is recommended to have them separate (i.e. two sets of 2.8 V
decoupling caps).
5. V
PP
, 6−7 V, is used for programming OTPM. This pad is left unconnected if OTPM is not being programmed.
6. V
DD
_1V8 can be combined with V
DD_
IO, if V
DD_
IO = 1.8 V.
7. V
DD
_1V2 and V
DD1
_1V2_PHY can be tied together.
8. ATEST1 can be left floating.
9. TEST pin must be tied to D
GND
.
10. DV
DD
_1V8 is the OTPM read voltage (must always be provided).
Figure 3. Typical Application Circuit
−
MIPI Connection
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4
AR0833
SIGNAL DESCRIPTIONS
AR0833 has 67 pads placed in a two sided pad frame. It
has only serial outputs. The part may be configured as MIPI
Table 4. PAD DESCRIPTIONS
Pad Name
SENSOR CONTROL
EXTCLK
GPIO0
Input
Input/Output
Master clock input; PLL input clock. 6 MHz−27 MHz
This is a SMIA−compliant pad
General Input and one Output function include:
a. (Default Output) Flash
b. (Input) all options in GPI2
High-Z before XSHUTDOWN going high; default value is ‘0’ after all three voltages in place
and XSHUTDOWN being high
After reset, this pad is not powered down since its default use is as Flash pin
If not used, can be left floating
General Input and 2 Output functions include:
a. (Default Output) Shutter
b. (Output) 3-D daisy chain communication output
c. (Input) all options in GPI2
High-Z before XSHUTDOWN going high; default value is ‘0’ after all three voltages in place
and XSHUTDOWN being high
After reset, this pad is not powered-down since its default use is as Shutter pin
If not used, can be left floating
General Input; After reset, these pads are powered down by default; this means that it is not
necessary to bond to these pads. Functions include:
a. S
ADDR
, switch to the second two-wire serial interface device address
(see “Slave Address/Data Direction Byte”)
b. Trigger signal for Slave Mode
c. Standby
If not used, can be left floating
General Input; After reset, these pads are powered-down by default; this means that it is not
necessary to bond to these pads. Functions include:
a. 3-D daisy chain communication input
b. All options in GPI2
If not used, can be left floating
Pad Type
Description
with different bit depths. The pad description is tabulated in
Table 4:
GPIO1
Input/Output
GPI2
Input
GPI3
Input
TWO-WIRE SERIAL INTERFACE
S
CLK
S
DATA
SERIAL OUTPUT
DATA[4:1]P
DATA[4:1]N
CLK_P
CLK_N
XSHUTDOWN
Output
Output
Output
Output
Input
Differential serial data (positive).
Differential serial data (negative)
Differential serial clock/strobe (positive)
Differential serial clock/strobe (negative)
Asynchronous active LOW reset. When asserted, data output stops and all internal registers
are restored to their factory default settings. This pin will turn off the digital power domain and
is the lowest power state of the sensor
Input
I/O
Serial clock for access to control and status registers
Serial data for reads from and writes to control and status registers
VCM DRIVER
VCM_ISINK
VCM_GND
POWER
V
PP
Input/Output
High-voltage pin for programming OTPM, present on sensors with that capability. This pin
can be left floating during normal operation
Input/Output
Input/Output
VCM Driver current sink output. If not used, it could be left floating
Ground connection to VCM Driver. If not used, needs to be connected to ground (D
GND
).
This ground must be separate from the other grounds
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5
Test/Measurement
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